1. A system for treating a lesion, comprising:
an introducer cannula defining a lumen therein;
a stylet configured to be removably inserted into the cannula lumen;
a resecting device configured to remove the lesion after being removably inserted into the cannula lumen, thereby creating a cavity within tissue adjacent the lesion;
an adjuvant treatment device configured to be removably inserted into the respective cannula lumen and tissue cavity, the adjuvant treatment device configured to deliver an adjuvant treatment to the tissue adjacent the lesion; and
a vacuum source fluidly connected to the cannula lumen so as to deliver vacuum to the tissue cavity while the adjuvant treatment device is disposed within the cannula lumen and tissue cavity, such that the tissue defining the tissue cavity collapses onto a distal end portion of the adjuvant treatment device disposed within the tissue cavity.
2. The system of claim 1, wherein the adjuvant treatment device is a brachytherapy device.
3. The system of claim 2, wherein the brachytherapy device comprises
a tubular body defining a first tubular body lumen,
an expandable body attached to the tubular body, and
a radiation source configured to be removably inserted through the first tubular body lumen and into the expandable body.
4. The system of claim 3, wherein the tubular body further defines a second tubular body lumen and an inflation port inside of the expandable body, wherein the inflation port is fluidly connected to the second tubular body lumen.
5. The system of claim 1, wherein, when the adjuvant treatment device is inserted into the cannula lumen, the introducer cannula and the adjuvant treatment device together define an annular lumen fluidly connecting the vacuum source to the tissue cavity.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for manufacturing a semiconductor device, the method comprising:
forming a dielectric layer on a semiconductor substrate;
forming a metal layer on the dielectric layer;
oxidizing an exposed surface of the metal layer at a first temperature so that the an exposed surface of the metal layer is changed into an oxide film while maintaining a portion of the metal layer between the substrate and the oxide film; and
heating the metal layer and the oxide film at a second temperature higher than the first temperature in an oxygen atmosphere, after oxidizing an exposed surface of the metal layer, wherein the second temperature is sufficiently high to change a predetermined electrical property of the interface between the metal layer and the semiconductor substrate.
2. The method as claimed in claim 1, wherein the metal layer is an upper electrode of a capacitor.
3. The method as claimed in claim 2, wherein the metal layer is formed of a material selected from the group consisting of iridium (Ir), rhodium (Rh), palladium (Pd), osmium (Os), and any combination of Ru, Ir, Rh, Pd, and Os.
4. The method as claimed in claim 3, wherein the dielectric layer is formed of a material selected from the group consisting of Ta2O5, SrTiO3 (STO), (Ba, Sr)TiO3 (BST), PbTiO3, Pb(Zr, Ti)O3 (PZT), SrBi2Ta2O5 (SBT), (Pb, La)(Zr, Ti)O3, Bi4Ti3O12, and BaTiO3 (BTO).
5. A method for manufacturing an integrated circuit capacitor, the method comprising:
forming a metal layer on a semiconductor substrate;
oxidizing an exposed surface of the metal layer at a first temperature so that the an exposed surface of the metal layer is changed into an oxide film while maintaining a portion of the metal layer between the substrate and the oxide film; and
heating the metal layer and the oxide film at a second temperature higher than the first temperature in an oxygen atmosphere, after oxidizing an exposed surface of the metal layer, wherein the second temperature is sufficiently high to change a predetermined electrical property of the interface between the metal layer and the semiconductor substrate.
6. The method as claimed in claim 5, wherein the metal layer is sufficiently oxidized by the oxidizing an exposed surface of the metal layer so that the oxide film is substantially resistant to further oxidation during the heating the metal layer and the oxide film at a second temperature higher than the first temperature.
7. The method as claimed in claim 5, wherein the first temperature is selected to be sufficiently high and a time duration for oxidizing is selected to sufficiently long to sufficiently oxidize the metal layer so that the roughness of the upper surface of the metal layer is not substantially changed during the heating the metal layer and the oxide film at a second temperature higher than the first temperature.
8. The method as claimed in claim 5, wherein the first temperature is selected to be sufficiently high and a time duration for oxidizing is selected to sufficiently long to sufficiently oxidize the metal layer to render it substantially resistant to further oxidation during the heating the metal layer and the oxide film at a second temperature higher than the first temperature.
9. The method as claimed in claim 5, wherein the first temperature is selected to be sufficiently low and a time duration for the oxidizing an exposed surface of the metal layer is selected to sufficiently short so that the roughness of the upper surface of the metal layer is not substantially changed.
10. The method as claimed in claim 5, wherein the first temperature is sufficiently low to avoid changing the electrical properties of the interface between the metal layer and the semiconductor substrate.
11. The method as claimed in claim 5, wherein the metal layer is formed of a material selected from the group consisting of iridium (Ir), rhodium (Rh), palladium (Pd), osmium (Os), and any combination of Ir, Rh, Pd, and Os.
12. The method as claimed in claim 11, wherein the dielectric layer is formed of a material selected from the group consisting of Ta2O5, SrTiO3 (STO), (Ba, Sr)TiO3 (BST), PbTiO3, Pb(Zr, Ti)O3 (PZT), SrBi2Ta2O5 (SBT), (Pb, La)(Zr, Ti)O3, Bi4Ti3O12, and BaTiO3 (BTO).