1. A chip carrier for a semiconductor chip, comprising:
a chip carrier body;
a solder mask layer formed on the chip carrier body and having a plurality of openings; and
a plurality of solder pads exposed in the openings, with at least two differently sized pitches being provided between the adjacent solder pads;
wherein the openings of the solder mask layer corresponding to the solder pads having a relatively smaller pitch of the at least two differently sized pitches are respectively formed with an opening extended portion extending outwardly with respect to the chip carrier.
2. The chip carrier of claim 1, wherein the chip carrier body is a substrate.
3. The chip carrier of claim 1, wherein the openings are formed as grooves in the solder mask layer.
4. The chip carrier of claim 1, wherein the solder pads are for being soldered to a plurality of metal bumps formed on the semiconductor chip, so as to allow the semiconductor chip to be mounted and electrically connected to the chip carrier body in a flip-chip manner.
5. The chip carrier of claim 1, wherein the relatively smaller pitch is sized smaller than 150 \u03bcm in width.
6. The chip carrier of claim 1, wherein the relatively smaller pitch is sized equal to 150 \u03bcm in width.
7. The chip carrier of claim 1, wherein a length of the opening extended portion is 2 to 5 times of a width of the relatively smaller pitch.
8. The chip carrier of claim 7, wherein the length of the opening extended portion is 3 times of the width of the relatively smaller pitch.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A wafer cluster tool comprising:
a plurality of processing stations for processing wafers, each processing station further comprising
a process chamber,
a local clock coupled to the process chamber;
a master server in communication with the local clock in each processing station, the master server including
a master clock
timetable software, wherein the timetable software records a local time for each clock in the plurality of processing stations and
scheduling software, the scheduling software having a pre-determined schedule for the cluster tool
wherein the pre-determined schedule is periodic according to a fixed sending period such that the pre-determined schedule is identical in each sending period
and wherein the time recorded on the local clocks of each processing station and the master clock is measured in units of the sending period.
2. The wafer cluster tool of claim 1, wherein each processing station further comprises:
a CPU coupled to the processing station, wherein the local clock coupled to the process chamber resides on the CPU.
3. The wafer cluster tool of claim 2 further comprising:
a local area network, wherein the master server is coupled to the CPU in each processing station via the local area network.
4. The wafer cluster tool of claim 3, further comprising:
a CPU coupled to the master server, wherein the master clock is resident on the CPU coupled to the master server.
5. The wafer cluster tool of claim 1, wherein the timetable software comprises a relational database.
6. The wafer cluster tool of claim 1, wherein the master server is coupled to the CPU in each processing station via the Internet.
7. The wafer cluster tool of claim 1, wherein the timetable software comprises a spreadsheet.
8. The wafer cluster tool of claim 7, wherein the timetable software is updated in real-time.