1-14. canceled
15. A honeycomb structure comprising:
an outer wall;
partition walls disposed inside the outer wall; and
a plurality of cells partitioned from one another by the partition walls, extending in the axial direction, each cell having a generally rectangular cross-section shape in the direction perpendicular to the axial direction;
wherein the honeycomb structure has a reinforced part in a part of the outer wall, and the reinforced part in the cross section perpendicular to the axial direction of the honeycomb structure lies at least in the range from the point located at 40\xb0 on the outer wall to the point located at 50\xb0 on the outer wall and within the range from the point located at 30\xb0 on the outer wall to the point located at 60\xb0 on the outer wall, with respect to the longitudinal direction of the partition wall about a sectional center of the honeycomb structure; and a mean thickness of the reinforced part in the perpendicular cross-section in the direction of the sectional center is in the range of 1 to 10 mm.
16. The honeycomb structure according to claim 15, wherein the reinforced part is formed by plugging.
17. The honeycomb structure according to claim 15, wherein a sum of length of the reinforced part in the axial direction of the honeycomb structure is preferably \u2153 or more relative to whole length of the honeycomb structure in the axial direction.
18. The honeycomb structure according to claim 15, wherein the partition walls and the outer wall contain ceramics as a main component.
19. The honeycomb structure according to claim 18, wherein a main component of the ceramics is one or more kinds selected from the group consisting of alumina, mullite, lithium aluminum silicate, cordierite, silicon carbide and silicon nitride.
20. The honeycomb structure according to claim 15, wherein porosity of the partition wall is 50% or more.
21. The honeycomb structure according to claim 15, wherein compressive strength in the axial direction is in a range of 0.5 to 10 MPa.
22. The honeycomb structure according to claim 15, wherein opening ends of predetermined cells are plugged at one end face and opening ends of a predetermined cells of the remaining cells are plugged at the other end face.
23. The honeycomb structure according to claim 22, wherein a catalyst capable of promoting combustion of diesel fine particles is held by the honeycomb structure.
24. An exhaust emission control system comprising:
an internal combustion engine; an exhaust pipe for discharging an exhaust gas from the internal combustion engine; and
an emission control apparatus, connected to the exhaust pipe, for cleaning the exhaust gas,
wherein the emission control apparatus includes at least one honeycomb structure according to claim 15, and further includes a cushioning material disposed on the outer circumference of the honeycomb structure and a can holding at least therein the honeycomb structure via the cushioning material.
25. A method of manufacturing a honeycomb structure having an outer wall; partition walls disposed inside the outer wall; a plurality of cells partitioned from one another by the partition walls, extending in the axial direction, each cell having a generally rectangular cross-section shape in the direction perpendicular to the axial direction; and a reinforced part provided in a part of the outer wall, the method comprising the steps of:
forming a formed body of the honeycomb structure;
firing the formed body to form a fired body; and
reinforcing for formation of the reinforced part,
wherein the reinforcing step is to form the reinforced part such that it lies at least in the range from the point located at 40\xb0 on the outer wall to the point located at 50\xb0 on the outer wall and within the range from the point located at 30\xb0 on the outer wall to the point located at 60\xb0 on the outer wall, with respect to the longitudinal direction of the partition wall about a sectional center of the honeycomb structure; and a mean thickness of the reinforced part in the perpendicular cross-section in the direction of the sectional center is in the range of 1 to 10 mm.
26. The method of manufacturing a honeycomb structure according to claim 25, wherein the reinforcing step is plugging opening ends of at least two adjacent cells located within the predetermined range on the same end face.
27. The method of manufacturing a honeycomb structure according to claim 25, wherein the reinforcing step includes cutting at least part of the fired body in the predetermined range and disposing a reinforcing material in the cut part.
28. The method of manufacturing a honeycomb structure according to claim 27, wherein the cutting step includes cutting the outer circumference of the fired body and cutting at least part of the partition wall within the predetermined range.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A phase lock loop capable of operating in a plurality of select states, generating a feedback clock tracing a reference clock, the phase lock loop comprising:
a phasefrequency detector comparing phase difference between the feedback clock and the reference clock to generate a comparative signal;
a charge pump generating a control voltage according to the comparative signal;
a voltage-controlled oscillator operating in one of the select states to generate an oscillating clock according to the control voltage and a select voltage, wherein the ratio of the frequency of the oscillating clock to the frequency of the feedback clock is an integer; and
a state select circuit adjusting the select voltage in accordance with the reference clock to select one of the select states, comprising:
a highestlowest clock generator, generating a highest frequency clock and a lowest frequency clock wherein the highest frequency and lowest frequency clocks corresond to the highest frequency oscillating clock and the lowest frequency oscillating clock generated by the voltage-controlled oscillator in one of the select states respectively;
a frequency comparator comparing the frequency of the reference clock with the frequency of the highest frequency oscillating clock and the frequency of the lowest frequency oscillating clock and generate a comparison result signal; and
a control circuit generating the select voltage according to the comparison result signal to the highestlowest clock generator and the voltage-controlled oscillator;
wherein the voltage-controlled oscillator is a first voltage-controlled oscillator, and the highestlowest clock generator comprises a second voltage-controlled oscillator and a third voltage-controlled oscillator receiving the select voltage to generate the highest frequency clock and the lowest frequency clock according to a first fixed voltage and a second fixed voltage respectively wherein the first fixed voltage is the maximum control voltage and the second fixed voltage is the minimum control voltage.
2. The phase lock loop of claim 1, wherein the phase lock loop further comprises a frequency divider dividing the frequency of the oscillating clock to generate the feedback clock.
3. The phase lock loop of claim 1, wherein the frequency comparator comprises:
a first comparison circuit checking if the highest frequency oscillating clock has a first number of transitional edges within one period of the reference clock; and
a second comparison circuit checking if the lowest frequency oscillating clock has a second number of transitional edges within one period of the reference clock;
wherein the comparison result signal is generated according to the comparison results of the first and second comparison circuits.
4. The phase lock loop of claim 3, wherein the control circuit comprises:
a weight refreshing circuit coupled to the first comparison
circuit and the second comparison circuit to generate a digital signal; and
a select voltage generating circuit converting the digital signal to the select voltage;
wherein the weight refreshing circuit increases the value of the digital signal when the comparison results of the first and second comparison circuits are in a first condition;
the weight refreshing circuit decreases the value of the digital signal when the comparison results of the first and second comparison circuits are in a second condition; and
the weight refreshing circuit holds the value of the digital signal when the comparison results of the first and second comparison circuits are in a third condition.
5. The phase lock loop of claim 4, wherein the select voltage generating circuit comprises:
a digital to analog current converter converting the digital signal into a select current; and
a current to voltage converter converting the select current into the select voltage.
6. The phase lock loop of claim 4, wherein the weight refreshing circuit comprises:
a first recorder recording the comparison result signal;
a second recorder recording the digital signal; and
a logic processor allowing the weight refreshing circuit to hold or change the digital signal according to the outputs of the first and second recorders.
7. The phase lock loop of claim 3, wherein the first and second comparison circuits comprise a plurality of D-type flip-flops coupled in series.
8. The phase lock loop of claim 1, wherein the voltage-controlled oscillator comprises a plurality of delay devices coupled in series and the delay time of each delay device is controlled by the control voltage and the select voltage.
9. A method for controlling a phase lock loop, the phase lock loop capable of operating in a plurality of select states, generating a feedback clock to trace a reference clock and operating in one of select states, the method comprising:
generating a first clock and a second clock corresponding to the highest and lowest frequency oscillating clocks generated by the phase lock loop operating in one of the select states respectively;
comparing the frequency of the first clock and the frequency of the reference clock;
comparing the frequency of the second clock and the frequency of the reference clock;
holding the select state of the phase lock loop when the first, second, and reference clocks are in a first predetermined condition; and
changing the select state of the phase lock loop when the first, second, and reference clocks are in a second predetermined conditions;
wherein the phase lock loop comprises a state select circuit and a first voltage-controlled oscillator operating in one of the select states, adjusting a select voltage to generate the first and second clocks by the state select circuit comprising:
supplying second and third voltage-controlled oscillators, receiving the select voltage; and
supplying first and second fixed voltages to the second and third voltage-controlled oscillators to generate the first and second clocks respectively wherein the first fixed voltage is one of the maximum and minimum control voltages when the second fixed voltage is the other in the first voltage-controlled oscillator.
10. The method of claim 9, wherein the first predetermined condition comprises frequency of the reference clock within the frequencies of the first and second clocks.
11. The method of claim 9, wherein comparing the frequency of the first clock and the frequency of the reference clock comprises:
calculating the number of transitional edges in the first clock within one period of the reference clock; and
comparing the number to a predetermined value.
12. The method according to claim 9, wherein comparing the frequency of the second clock and the frequency of the reference clock comprises:
calculating the number of transitional edges in the second clock within one period of the reference clock; and
comparing the number to the predetermined value.