1. A method of synthesizing frequency, producing a plurality of carrier frequencies for Ultra Wideband (UWB) with multi-band orthogonal frequency division multiplexing (MB-OFDM), the carrier frequencies comprising first through fourteenth frequencies in an order of low to high, any two adjacent carrier frequencies being separated by a fundamental separation frequency, the method comprising:
grouping the carrier frequencies into first through fifth frequency groups comprising the first to third frequencies, the fourth to sixth frequencies, the seventh to ninth frequencies, the tenth to twelfth frequencies, and the thirteenth to fourteenth frequencies;
generating a center frequency of the third frequency group;
performing frequency mixing on the center frequency of the third frequency group to produce center frequencies of the first, second, fourth, and fifth frequency groups; and
performing frequency mixing on the center frequencies of the first through fifth frequency groups to produce two adjacent frequencies for each center frequency.
2. The method of synthesizing frequency of claim 1, wherein the generation comprises:
generating first and second separation frequencies, each being an integer multiple of the fundamental separation frequency, and
performing the frequency mixing on the center frequency of the third frequency group and the first and second separation frequencies to generate the center frequencies for the first and fifth frequency groups, and the second and fourth frequency groups.
3. The method of synthesizing frequency of claim 1, wherein the first and second separation frequencies are six and three times the fundamental separation frequency.
4. The method of synthesizing frequency of claim 1, wherein producing the two adjacent frequencies comprises:
generating the fundamental separation frequency; and
performing the frequency mixing on the center frequencies of the first through fifth frequency groups and the fundamental separation frequency to generate the two adjacent frequencies for each center frequency.
5. A method of synthesizing frequency, producing a plurality of carrier frequencies for Ultra Wideband (UWB) with multi-band orthogonal frequency division multiplexing (MB-OFDM), the carrier frequencies comprising first through fourteenth frequencies in an order of low to high, any two adjacent carrier frequencies being separated by a fundamental separation frequency, the method comprising:
generating the eighth frequency;
generating first and second separation frequencies, and selecting a separation output frequency between the first and second separation frequencies, wherein the first and second separation frequencies are multiples of the fundamental separation frequency;
generating the fundamental separation frequency;
performing the frequency mixing on the eighth frequency and the separation output frequency to generate a first output frequency, wherein the output frequency is the eighth, second, fourteenth, fifth, or eleventh carrier frequency; and
performing frequency mixing selectively on the first output frequency and the fundamental separation frequency to generate a second output frequency, wherein the second output frequency is one of the first through fourteenth frequencies.
6. The method of synthesizing frequency of claim 5, wherein the first and second separation frequencies are six times and three times the fundamental separation frequency.
7. The method of synthesizing frequency of claim 5, wherein generating the first and second separation frequencies step comprises:
generating the first separation frequency; and
dividing the first separation frequency by an integer to generate the second separation frequency.
8. The method of synthesizing frequency of claim 5, wherein generating the fundamental separation frequency step comprises dividing the second separation frequency by an integer to generate the fundamental separation frequency.
9. The method of synthesizing frequency of claim 5, wherein generating the first and second separation frequency comprises:
generating the first separation frequency;
dividing the first separation frequency by an integer to generate the second separation frequency; and
wherein generating the fundamental separation frequency comprises dividing the second separation frequency by an integer to generate the fundamental separation frequency.
10. The method of synthesizing frequency of claim 5, wherein the generation of the eighth frequency utilizes a phase lock loop (PLL).
11. The method of synthesizing frequency of claim 10, wherein the generation of the first separation frequency utilizes the phase lock loop.
12. The method of synthesizing frequency of claim 9, wherein the generation of the eighth frequency utilizes a phase lock loop.
13. The method of synthesizing frequency of claim 12, wherein the generation of the first separation frequency utilizes the phase lock loop.
14. The method of synthesizing frequency of claim 12, wherein the first and the second integers are three and two.
15. A frequency synthesizer, producing a plurality of carrier frequencies for Ultra Wideband (UWB) with multi-band orthogonal frequency division multiplexing (MB-OFDM), the carrier frequencies comprising first through fourteenth frequencies in an order of low to high, any two adjacent carrier frequencies being separated by a fundamental separation frequency, the frequency synthesizer comprising:
a phase lock loop, generating the eighth carrier frequency;
a first mixer, performing selective frequency mixing on the eighth frequency to generate first output frequency, wherein the output frequency is the eighth, second, fourteenth, fifth, or eleventh carrier frequency; and
a second mixer, performing selective frequency mixing on the first output frequency to generate second output frequency, wherein the output frequency is one of the first through the fourteenth frequencies; and
a separation frequency generator, selectively outputting one of the first or the second separation frequencies as a separation output frequency, wherein the first and second separation frequencies are six times and three times the fundamental separation frequency, and the first mixer outputs the eighth frequency directly, or performs frequency mixing on the eighth frequency and the separation output frequency to generate one of the second, the fourteenth, the fifth, and the eleventh frequencies.
16. The frequency synthesizer of claim 15, further comprising a separation frequency generator, generating the basic separation frequencies as a separation output frequency, wherein the second mixer outputs the first output frequency directly, or performs frequency mixing on the first output frequency and the basic separation output frequency to generate one of the first, the third, the fourth, the sixth, the seventh, the ninth, the tenth, the twelfth, or the thirteenth frequencies.
17. The frequency synthesizer of claim 15, wherein the separation frequency generator further generates the basic separation frequencies as a separation output frequency, and the second mixer outputs the first output frequency directly, or performs frequency mixing on the first output frequency and the basic separation output frequency to generate one of the first, the third, the fourth, the sixth, the seventh, the ninth, the tenth, the twelfth, or the thirteenth frequencies.
18. A frequency synthesizer, producing a plurality of carrier frequencies for Ultra Wideband (UWB) with multi-band orthogonal frequency division multiplexing (MB-OFDM), the carrier frequencies comprising first through fourteenth frequencies in an order of low to high, any two adjacent carrier frequencies being separated by a fundamental separation frequency, the frequency synthesizer comprising:
a phase lock loop (PLL), generating an initialization signal having a frequency equivalent to the eighth frequency;
a separation frequency generator, outputting first and second separation output signals, wherein the first or second separation frequency equals a multiple of the fundamental separation frequency, and a frequency of the second separation output frequency is the fundamental separation frequency;
a first mixer, performing frequency mixing on the eighth frequency and the separation output frequency to generate first output frequency, wherein the output frequency is the eighth, second, fourteenth, fifth, or eleventh carrier frequency; and
a second mixer, performing frequency mixing selectively on the first output frequency and the fundamental separation frequency to generate second output frequency, wherein the output frequency is one of the first through fourteenth frequencies.
19. The frequency synthesizer of claim 18, wherein the first and second separation frequencies are six times and three times the fundamental separation frequency.
20. The frequency synthesizer claim 18, wherein the separation frequency generator comprises:
a first divider, coupled to a first separation signal with a first separation frequency, dividing the first separation frequency by a first integer to generate a second separation signal with the second separation frequency; and
a second divider, coupled to the second separation signal, dividing the second separation frequency by a second integer to generate the second separation output signal, and
a multiplexer, receiving the first and second separation signals, and selectively outputting one thereof as the first separation output signal.
21. The frequency synthesizer claim 20, wherein the phase lock loop further outputs the first separation signal.
22. The frequency synthesizer claim 21, wherein the phase lock loop comprises first and second voltage control oscillators, outputting the initialization signal and the first separation signal respectively.
23. The frequency synthesizer claim 20, wherein the first and second integers are 2 and 3 respectively.
24. The frequency synthesizer claim 23, wherein the second divider comprises:
a divide-by-3 circuit, receiving the second separation signal, dividing frequency of the second separation signal by the second integer to generate an output signal with two possible phases; and
a multiphase filter, receiving the output signal to generate the second separation output signal with four possible phases.
25. The frequency synthesizer claim 18, wherein the first mixer comprises:
a path selector, altering phase order of the first separation output signal to generate a changed phase signal;
a single-side band mixer, performing frequency mixing on the initialization and the changed phase signal to generate mixed output signal, wherein the mixed output signal is one of the second, fourteenth, fifth, and eleventh signals; and
a multiplexer, receiving the mixed output signal and the initialization signal, and outputting one thereof as the first output signal.
26. The frequency synthesizer claim 18, wherein the second mixer comprises:
a path selector, altering phase order of the second separation output signal to generate a changed phase signal;
a single-side band mixer, performing frequency mixing on the initialization and the changed phase signal to generate mixed output signal, wherein the mixed output signal is one of the first, third, fourth, sixth, seventh, ninth, tenth, twelfth, and thirteenth signals; and
a multiplexer, receiving the mixed output signal and the first output signal, and selectively outputting one thereof as the second output signal.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An automatic record detection device for stop arm violation event, comprising:
a plurality of image fetching units, each of them is used to fetch external video signals;
at least an analog-to-digital converter, connected electrically to said image fetching unit, to process said external video signal into digital data;
at least a processor unit, connected electrically to said analog-to-digital converter to receive said digital data, and it detects said dynamic images of said digital data based on a set sensitivity value, when said set sensitivity value fulfills a set condition, it determines, triggers, and records a violation event;
at least a storage unit, connected electrically to said processor unit, so that said processor unit reads or writes said digital data or said violation event fromto said storage unit; and
at least an input unit, connected electrically to said processor unit, to send an activation signal to said processor unit, so that upon receiving said activation signal, said processor unit detects said dynamic image, to determine said violation event.
2. The automatic record detection device for stop arm violation event as claimed in claim 1, further comprising: at least an audio unit, used to fetch an external audio signal, said audio unit is connected electrically to said analog-to-digital converter, and said analog-to-digital converter processes said external audio signal into said digital data.
3. The automatic record detection device for stop arm violation event as claimed in claim 2, further comprising: at least a digital-to-analog converter, connected electrically to said processor unit, said digital-to-analog converter receives and processes said digital data into an image signal.
4. The automatic record detection device for stop arm violation event as claimed in claim 3, further comprising: a display unit and a loudspeaker unit, said display unit is connected electrically to said digital-to-analog converter, to receive and display said image signal, said loudspeaker unit is connected electrically to said digital-to-analog converter, to receive and display said audio signal.
5. The automatic record detection device for stop arm violation event as claimed in claim 1, wherein when a plurality of image fetching units are provided, any one of said image fetching units is set into an open or closed state.
6. The automatic record detection device for stop arm violation event as claimed in claim 1, wherein said set condition is an image block number of said digital data, with its range from 1 to entire image.
7. The automatic record detection device for stop arm violation event as claimed in claim 1, further comprising:
a random access memory (RAM), connected electrically to said processor unit, for reading or writing data; and
a read only memory (ROM), connected electrically to said processor unit, used for reading said digital data.
8. The automatic record detection device for stop arm violation event as claimed in claim 1, further comprising: a network control interface, connected electrically to said processor unit, said processor unit is connected to an Ethernet or a wireless network through said network control interface, to transmit said digital data and said violation event to a server.
9. The automatic record detection device for stop arm violation event as claimed in claim 8, wherein said server receives said digital data and said violation event, to transmit said digital data and said violation event to a remote end user on its own initiative.
10. The automatic record detection device for stop arm violation event as claimed in claim 1, further comprising: a universal serial bus (USB) interface, connected electrically to said processor unit. such that said processor unit transmits said digital data and said violation event to a peripheral device through said USB interface.
11. The automatic record detection device for stop arm violation event as claimed in claim 1, wherein said storage unit is a memory card or a hard disk.
12. The automatic record detection device for stop arm violation event as claimed in claim 1, wherein said input unit is an alarm unit, provided with a sensor or a stop arm, said stop arm having an open state and a closed state, said sensor is connected electrically to said stop arm, to sense state of said stop arm.
13. The automatic record detection device for stop arm violation event as claimed in claim 1, wherein said processor unit is a digital data processor or a central processor unit (CPU) or a combination of both.
14. An automatic record detection method for stop arm violation event, comprising following steps:
(A) transmit an activation signal;
(B) set an external video signal in at least a region to be detected;
(C) generate digital data based on said external video signal;
(D) perform detecting dynamic images of said digital data based on a set sensitivity value; and
(E) determine if said set sensitivity value fulfills a set condition, if answer is negative, return to step (C), otherwise, determine if said dynamic image belongs to a violation event, and continue to execute step (C).
15. The automatic record detection method for stop arm violation event as claimed in claim 14, wherein after said step (C), it further includes a step of : setting an external video signal in a region to be detected, to generate said digital data based on said external video signal.
16. The automatic record detection method for stop arm violation event as claimed in claim 15, wherein said digital data includes an image signal and an audio signal.
17. The automatic record detection method for stop arm violation event as claimed in claim 15, wherein after said step (E), it further includes a step of: writing said digital data and said violation event into at least a storage unit.
18. The automatic record detection method for stop arm violation event as claimed in claim 15, wherein after said step (E), it further includes a step of: transmitting a termination signal to end said automatic record detection method for stop arm violation event.
19. The automatic record detection method for stop arm violation event as claimed in claim 18, wherein said storage unit is a memory card or a hard disk.
20. The automatic record detection method for stop arm violation event as claimed in claim 14, wherein said set condition is an image block number of said digital data, with its range from 1 to entire image.
21. The automatic record detection method for stop arm violation event as claimed in claim 14, wherein said digital data and said violation event are transmitted to a server via an Ethernet or a wireless network.
22. The automatic record detection method for stop arm violation event as claimed in claim 21, wherein said server receives said digital data and said violation event, and transmits said digital data and said violation event to a remote end user on its own initiative.
23. The automatic record detection method for stop arm violation event as claimed in claim 14, wherein said digital data and said violation event are transmitted to a peripheral device through a universal serial bus (USB) interface.