1. A method comprising:
introducing a multi-cycle instruction including two or more sub-instructions into multiple stages of a pipeline;
writing a result generated in response to a sub-instruction in a speculative commit register; and
writing a value in the speculative commit register to an architectural register in response to the multi-cycle instruction committing, wherein the committing occurs when a last sub-instruction of the multi-cycle instruction reaches a write back stage of the pipeline.
2. The method of claim 1, wherein writing the value to the architectural register comprises writing the value to a pointer register.
3. The method of claim 1, wherein introducing the multi-cycle instruction into the pipeline comprises introducing a non-terminal sub-instruction and a terminal sub-instruction into the pipeline.
4. The method of claim 3, wherein writing the value in response to the multi-cycle instruction committing comprises writing the value, in response to the terminal sub-instruction committing.
5. The method of claim 1, wherein writing the result comprises writing a frame pointer value.
6. The method of claim 1, wherein writing the result comprises writing a stack pointer value.
7. An article comprising a machine-readable medium which stores machine-executable instructions, the instructions causing a machine to:
introduce a multi-cycle instruction including two or more sub-instructions into multiple stages of pipeline;
write a result generated in response to a sub-instruction in a speculative commit register; and
write a value in the speculative commit register to an architectural register in response to the multi-cycle instruction committing, wherein the committing occurs when a last sub-instruction of the multi-cycle instruction reaches a write back stage of the pipeline.
8. The article of claim 7, wherein the architectural register comprises a pointer register.
9. The article of claim 7, wherein the multi-cycle instruction comprises a non-terminal sub-instruction and a terminal sub-instruction.
10. The article of claim 9, wherein the multi-cycle instruction commits when the terminal sub-instruction commits.
11. The article of claim 7, wherein the architectural register comprises a frame pointer register.
12. The article of claim 7, wherein the architectural register comprises a stack pointer register.
13. A processor comprising:
a pipeline operative to execute a multi-cycle instruction including a terminal sub-instruction and a non-terminal sub-instruction;
an architectural register;
a speculative commit register operative to store results generated in response to the sub-instructions; and
a controller operative to control writing a result from the speculative commit register to the architectural register in response to the terminal sub-instruction committing, wherein the committing occurs when the terminal sub-instruction of the multi-cycle instruction reaches a write back stage of the pipeline.
14. The processor of claim 13, further comprising a switching element comprising:
a first input data line coupled to the pipeline;
a second input data line coupled to the speculative commit register; and
an output data line coupled to the architectural register,
said switching element being operative to switch between the first input data line and the second input data line in response to control signals from the controller.
15. The processor of claim 13, wherein the switching element comprises a multiplexer.
16. The processor of claim 13, wherein the architectural register comprises a pointer register.
17. The processor of claim 13, wherein the architectural register comprises a stack pointer register.
18. The processor of claim 13, wherein the architectural register comprises a frame pointer register.
19. The processor of claim 13, wherein the multi-cycle instruction comprises an instruction operative to invoke a subroutine.
20. The processor of claim 13, wherein the multi-cycle instruction comprises an instruction operative to exit a subroutine.
21. The processor of claim 13, wherein the multi-cycle instruction comprises an instruction operative to push or pop two or more values from a stack in sequence.
22. A system comprising:
a static random address memory; and
a processor coupled to the static random access memory, said processor comprising:
a pipeline operative to execute a multi-cycle instruction including a terminal sub-instruction and a non-terminal sub-instruction;
an architectural register;
a speculative commit register operative to store results generated in response to the sub-instructions; and
a controller operative to control writing a result from the speculative commit register to the architectural register in response to the terminal sub-instruction committing, wherein the committing occurs when the terminal sub-instruction of the multi-cycle instruction reaches a write back stage of the pipeline.
23. The system of claim 22, wherein the architectural register comprises a frame pointer register.
24. The system of claim 22, wherein the architectural register comprises a stack pointer register.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A active object detection system to detect objects of at least a specified size by emitting light pulses and receiving corresponding return reflections, said active object detection system comprising:
a distance determining circuit configured to calculate distance to a detected object by determining an elapsed time between emitting a light pulse and receiving a corresponding return reflection from the object; and
a clutter rejection circuit configured to reject clutter-related return reflections for instances where more than one return reflection is received for a given light pulse.
2. The active object detection system of claim 1, wherein the active object detection system is configured with a determined monitoring boundary, and wherein, for a given light pulse for which more than one return reflection was received, the clutter rejection circuit is configured to reject any return reflections preceding a last one of the more than one return reflection.
3. The active object detection system of claim 2, wherein, the clutter rejection circuit rejects any return reflections preceding a last one of the more than one return reflection by preventing distance determination processing for any earlier return reflection or by otherwise ignoring distance determinations for any earlier return reflection, such that the active object detection system detects object distance according to the last return reflection.
4. The active object detection system of claim 1, wherein the active object detection system is configured with a determined monitoring boundary, and wherein, for a given light pulse for which more than one return reflection was received, the clutter rejection circuit is configured to reject as clutter-related return reflections all but a last one of the more than one return reflection having a minimum strength.
5. The active object detection system of claim 1, wherein the clutter rejection circuit or an associated circuit within the active object detection system determines strengths of return reflections based on determining reflection pulse width, performing reflection pulse integration, or determining reflection pulse amplitude.
6. The active object detection system of claim 1, wherein, for an instance where more than one return reflection is received for a given light pulse, the clutter rejection circuit is configured to identify individual ones of the more than one return reflection as clutter-related or object-related based on evaluating at least one of a reception order for the more than one return reflection and evaluating signal strengths for the more than one return reflection on a relative or absolute basis.
7. The active object detection system of claim 1, wherein the active object detection system is configured to expect a return reflection corresponding to a known object distance, for one or more light pulse directions, and wherein the clutter rejection circuit is configured to perform clutter rejection processing for the one or more light pulse directions by ignoring or otherwise rejecting all but a last return reflection received for a light pulse emitted in a given light beam direction, or by ignoring all but a last strength-qualified return reflection received for the light pulse.
8. The active object detection system of claim 1, wherein the active object detection system includes a light transmitting system configured to emit light pulses in one or more beam directions defining a scanning plane or area, and includes a light receiving system that is coaxial or quasi-coaxial with the light transmitting system, such that the light receiving system receives return reflections along the same beam directions as the light transmitting system emits light pulses.
9. The active object detection system of claim 8, wherein the light transmitting and light receiving systems include a movable light pulse deflector configured to deflect light pulses in defined directions outward from the active object detection system, and a movable return reflection deflector configured to deflect return reflections incoming to the active object detection system to a light detector configured to generate one or more electrical signals responsive to the return reflections.
10. The active object detection system of claim 1, wherein the distance determining circuit and the clutter rejection circuit are at least partly implemented in a microprocessor executing corresponding computer program instructions stored in a memory of the active object detection system.
11. The active object detection system of claim 1, wherein the active object detection system is configured to monitor for objects according to a predetermined monitoring radius or contour by emitting directed light pulses and monitoring for corresponding return reflections, and wherein the clutter rejection circuit is configured to determine whether a last one of the more than one return reflections received for a given light pulse is inside or at the predetermined monitoring radius or contour and, if so, to identify that last return reflection as an object-related return reflection for object distance determination by active object detection system.
12. The active object detection system of claim 1, wherein the clutter rejection circuit is configured to pre-sample a clutter background for one or more beam directions along which the active object detection system emits light pulses, and to subtract the clutter background determined for a given beam direction from an overall return reflection signal obtained for a given light pulse emitted on the given beam direction, to isolate an object-related return reflection component of the overall return reflection signal.
13. The active object detection system of claim 1, wherein the active object detection system is configured to learn a reference contour and then monitor for changes or deviations from the learned reference contour.
14. A method of active object detection to detect objects of at least a specified size based on emitting light pulses and receiving corresponding return reflections, said method comprising:
calculating distance to a detected object by determining an elapsed time between emitting a light pulse and receiving a corresponding return reflection from the object; and
rejecting clutter-related return reflections for instances where more than one return reflection is received for a given light pulse.
15. The method of claim 14, further comprising detecting objects within or along a determined monitoring boundary or contour, and wherein, for a given light pulse for which more than one return reflection was received, rejecting as clutter-related return reflections any return reflections preceding a last one of the more than one return reflection.
16. The method of claim 15, further comprising using the last one of the more than one return reflection for object distance determination.
17. The method of claim 14, further comprising detecting objects within or along a determined monitoring boundary or contour, and wherein, for a given light pulse for which more than one return reflection was received, rejecting as clutter-related reflections all but a last one of the more than one return reflection having a minimum strength.
18. The method of claim 14, further comprising determining strengths of return reflections based on determining reflection pulse width, performing reflection pulse integration, or determining reflection pulse amplitude.
19. The method of claim 14, wherein, rejecting clutter-related return reflections comprises identifying individual ones of the more than one return reflection received for a given light pulse as clutter-related or object-related based on evaluating at least one of a reception order for the more than one return reflection and evaluating signal strengths for the more than one return reflection on a relative or absolute basis.
20. The method of claim 14, further comprising configuring object detection processing to expect a return reflection corresponding to a known object distance, for one or more light pulse directions, and performing clutter rejection processing for the one or more light pulse directions by ignoring or otherwise rejecting all but a last return reflection received for a light pulse emitted in a given light beam direction, or by ignoring all but a last strength-qualified return reflection received for the light pulse.
21. The method of claim 14, further comprising monitoring for objects according to a predetermined monitoring radius or contour by emitting directed light pulses and monitoring for corresponding return reflections, and rejecting clutter-related return reflections for instances where more than one return reflection is received for a given light pulse by determining whether a last one of the more than one return reflection is inside or at the predetermined monitoring radius or contour and, if so, treating that last return reflection as an object-related return reflection for distance determination and ignoring the other return reflections as clutter-related reflections.
22. The method of claim 14, wherein rejecting clutter-related return reflections for instances where more than one return reflection is received for a given light pulse comprises pre-sampling a clutter background for one or more beam directions along which light pulses are emitted, and subtracting the clutter background determined for a given beam direction from an overall return reflection signal obtained for a given light pulse emitted on the given beam direction, to isolate an object-related return reflection component of the overall return reflection signal.
23. The method of claim 14, further comprising learning a reference contour and then monitoring for changes or deviations from the learned reference contour.
24. A method of actively detecting objects of at least a specified size comprising:
in a learning mode, scanning an area bounded by a fixed contour as defined by one or more fixed objects, based on emitting a light pulse at each of a number of scan positions, receiving a return reflection from the fixed contour, calculating the contour distance for that scan position based on elapsed time between the light pulse and the return reflection, and remembering the distance;
in a monitoring mode, scanning the bounded area and detecting whether any object-related reflections deviate from the remembered distances; and
rejecting clutter-related return reflections while monitoring, for instances where more than one return reflection is received for a given light pulse.
25. The method of claim 25, wherein rejecting clutter-related return reflections comprises, for instances in which more than one return reflection was received for a light pulse emitted at a given scan position, determining whether a last one of the return reflections matches the remembered distance for that scan position and, if so, rejecting any preceding return reflections as clutter-related return reflections.