1. A system for monitoring reliability of a digital system, the system comprising:
at least one ring oscillator sensor implemented in association with the digital system for facilitating monitoring reliability thereof, the digital system including a circuit composition comprising at least one logic type, the at least one logic type comprising at least one device type, and wherein the at least one ring oscillator sensor includes a circuit composition comprising one or more of the at least one logic type or the at least one device type of the digital system selected based on the circuit composition of the digital system to correlate aging of the at least one ring oscillator sensor to aging of the digital system, the at least one ring oscillator sensor outputting count signals;
counter logic coupled to the at least one ring oscillator sensor for converting the count signals to an oscillation frequency of the at least one ring oscillator sensor; and
control logic coupled to the counter logic for periodically evaluating oscillation frequency of the at least one ring oscillator sensor and generating a warning signal indicative of reliability degradation thereof, and hence of the digital system, if at least one of:
(i) a measured or estimated oscillation frequency of the at least one ring oscillator sensor is below a warning threshold frequency for the digital system; or
(ii) a measured or estimated rate of change in a difference between measured oscillation frequencies of the at least one ring oscillator sensor exceeds an acceptable rate of change threshold for the digital system.
2. The system of claim 1, wherein the circuit composition of the digital system comprises multiple logic types, and the circuit composition of the at least one ring oscillator sensor also comprises the multiple logic types, wherein percentages of specific logic types of the multiple logic types within the at least one ring oscillator sensor mirror percentages of specific logic types of the multiple logic types within the digital system.
3. The system of claim 1, wherein the circuit composition of the digital system comprises multiple device types, and the circuit composition of the at least one ring oscillator sensor also comprises the multiple device types, wherein percentages of specific device types of the multiple device types within the at least one ring oscillator sensor mirror percentages of specific device types of the multiple device types within the digital system.
4. The system of claim 1, wherein the circuit composition of the digital system comprises multiple logic types and multiple device types, and wherein the circuit composition of the at least one ring oscillator sensor also comprises the multiple logic types and the multiple device types of the digital system, wherein percentages of specific logic types of the multiple logic types and specific device types of the multiple device types within the at least one ring oscillator sensor mirror percentages of specific logic types of the multiple logic types and specific device types of the multiple device types within the digital system.
5. The system of claim 1, wherein the digital system comprises multiple digital function blocks and multiple circuit areas, and wherein the system further comprises multiple ring oscillator sensors, each ring oscillator sensor being associated with at least one of the multiple digital function blocks or multiple circuit areas of the digital system to mirror at least one of a logic type or a device type composition thereof and provide count signals useful in monitoring aging of the associated at least one digital function block or circuit area of the digital system.
6. The system of claim 1, wherein the circuit composition of the digital system comprises multiple logic types, the multiple logic types comprising at least two of AND logic, NAND logic, OR logic, NOR logic, and INVERTER logic, and wherein the multiple logic types of the digital system further comprise at least one device type, the at least one device type comprising one or more of a thin oxide device, a thick oxide device, a low VT-doped device or a high VT-doped device.
7. The system of claim 1, wherein the digital system and the at least one ring oscillator sensor are powered by a common power supply.
8. The system of claim 1, wherein the digital system comprises multiple digital function blocks, and wherein the system further comprises multiple ring oscillator sensors, each ring oscillator sensor being embedded within a respective digital function block of the multiple digital function blocks, and wherein each digital function block and associated ring oscillator sensor are powered by a common power supply.
9. The system of claim 1, wherein the digital system further comprises at least one digital function block, and the at least one ring oscillator sensor is associated with the at least one digital function block, and wherein the at least one ring oscillator sensor further comprises an enable input electrically coupled to an input of the associated at least one digital function block, the at least one ring oscillator sensor being enabled with receipt of a request at the associated at least one digital function block.
10. The system of claim 1, wherein the control logic employs multiple determined oscillation frequencies of the at least one ring oscillator sensor in estimating a next oscillation frequency of the at least one ring oscillator sensor, and wherein the generating of the warning signal comprises generating the warning signal if the estimated next oscillation frequency of the at least one ring oscillator sensor is below the warning threshold frequency.
11. The system of claim 1, wherein the control logic periodically determines a rate of change in a difference between measured oscillation frequencies of the at least one ring oscillator sensor, and employs multiple determined rates of change between measured oscillation frequencies of the at least one ring oscillator sensor in estimating a next rate of change employing one of a linear model estimation or a historical aging data for the at least one ring oscillator sensor, and wherein the control logic estimates a next oscillation frequency of the at least one ring oscillator sensor employing the estimated next rate of change in the difference between measured oscillation frequencies of the at least one ring oscillator sensor, and wherein generating the warning signal comprises generating the warning signal if the estimated next oscillation frequency of the at least one ring oscillator sensor is below a warning threshold frequency for the digital system.
12. The system of claim 1, wherein the control logic further dynamically adjusts a sampling period employed in the periodically evaluating oscillation frequency of the at least one ring oscillator sensor, the dynamically adjusting comprising:
estimating a time interval from a most recent determination of oscillation frequency of the at least one ring oscillator sensor to the at least one ring oscillator sensor reaching the warning threshold frequency;
employing the estimated time interval in setting a next sampling period for determining the oscillation frequency of the at least one ring oscillator sensor;
determining whether the next sampling period is less than a previous sampling period employed in the periodically evaluating oscillation frequency of the at least one ring oscillator sensor; and
if so, increasing the sampling period to increase the sampling rate of the periodically evaluating oscillation frequency of the at least one ring oscillator sensor.
13. A system for monitoring reliability of a digital system, the system comprising:
at least one ring oscillator sensor embedded within a digital system for facilitating monitoring reliability thereof, the digital system including a circuit composition comprising at least one logic type, and at least one device type employed in the at least one logic type, and wherein the at least one ring oscillator sensor includes a circuit composition at least partially mirroring percentages of the at least one logic type and the at least one device type employed in the circuit composition of the digital system, wherein aging of the at least one ring oscillator sensor is correlated to aging of the digital system, the at least one ring oscillator sensor outputting count signals;
counter logic coupled to the at least one ring oscillator sensor for converting the count signals to an oscillation frequency of the at least one ring oscillator sensor; and
control logic coupled to the counter logic for periodically evaluating oscillation frequency of the at least one ring oscillator sensor and generating a warning signal indicative of reliability degradation thereof, and hence of the digital system, if at least one of:
(i) a measured or estimated oscillation frequency of the at least one ring oscillator sensor is below a warning threshold frequency for the digital system; or
(ii) a measured or estimated rate of change in a difference between measured oscillation frequencies of the at least one ring oscillator sensor exceeds an acceptable rate of change threshold for the digital system.
14. The system of claim 13, wherein the digital system and the at least one ring oscillator sensor are powered by a common power supply, logic and device type circuit composition of the at least one ring oscillator sensor mirrors percentages of logic and device types employed in the digital system, and the at least one ring oscillator sensor is enabled only when the digital system is active, thereby facilitating correlating aging of the at least one ring oscillator sensor to aging of the digital system.
15. A method of monitoring reliability of a digital system, the method comprising:
obtaining at least one ring oscillator sensor embedded within a digital system for facilitating monitoring reliability thereof, the digital system including a circuit composition comprising at least one logic type, the at least one logic type comprising at least one device type, and wherein logic and device type composition percentages for the at least one ring oscillator sensor mirror circuit composition percentages of one or more of the at least one logic type or the at least one device type within the digital system to correlate aging of the at least one ring oscillator sensor to aging of the digital system, the at least one ring oscillator sensor outputting count signals;
converting the count signals of the at least one ring oscillator sensor to an oscillation frequency of the at least one ring oscillator sensor; and
periodically evaluating oscillation frequency of the at least one ring oscillator sensor, and generating a warning signal indicative of a reliability degradation thereof, and hence of the digital system, if at least one of:
(i) a measured or estimated oscillation frequency of the at least one ring oscillator sensor is below a warning threshold frequency for the digital system; or
(ii) a measured or estimated rate of change in a difference between measured oscillation frequencies of the at least one ring oscillator sensor exceeds an acceptable rate of change threshold for the digital system.
16. The method of claim 15, wherein the circuit composition of the digital system comprises multiple logic types and multiple device types, and wherein the circuit composition of the at least one ring oscillator sensor also comprises the multiple logic types and the multiple device types of the digital system, wherein percentages of specific logic types of the multiple logic types and specific device types of the multiple device types within the at least one ring oscillator sensor mirror percentages of specific logic types of the multiple logic types and specific device types of the multiple device types within the digital system.
17. The method of claim 15, wherein the digital system comprises multiple digital function blocks and multiple circuit areas, and wherein the obtaining further comprises obtaining multiple ring oscillator sensors, each ring oscillator sensor being associated with at least one of the multiple digital function blocks or multiple circuit areas of the digital system to mirror at least one of a logic type or a device type composition thereof and provide count signals useful in monitoring aging of the associated at least one digital function block or circuit area of the digital system.
18. The method of claim 15, wherein the digital system and the at least one ring oscillator sensor are powered by a common power supply, and wherein the method further comprises enabling the at least one ring oscillator sensor only when the digital system is active, thereby facilitating correlating aging of the at least one ring oscillator sensor with aging of the digital system.
19. The method of claim 15, wherein the digital system further comprises multiple digital function blocks, and the obtaining comprises obtaining multiple ring oscillator sensors, each ring oscillator sensor being embedded within a respective digital function block of the multiple digital function blocks, and wherein each digital function block and associated ring oscillator sensor share a power supply and the associated ring oscillator sensor is only enabled when the digital function block is active.
20. The method of claim 15, wherein the circuit composition of the digital system comprises multiple logic types, the multiple logic types comprising at least two of AND logic, NAND logic, OR logic, NOR logic, and INVERTER logic, and wherein the multiple logic types of the digital system further comprise at least one device type, the at least one device type comprising one or more of a thin oxide device, a thick oxide device, a low VT-doped device, or a high VT-doped device.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A method for fabricating a ferroelectric capacitor in an integrated circuit, the method comprising:
fabricating a metal-oxide-semiconductor transistor on a substrate;
depositing an insulating layer on the metal-oxide-semiconductor transistor;
depositing a conducting layer on the insulating layer using a low temperature process; and
depositing a ferroelectric layer on the conducting layer using a low temperature process.
2. The method as set forth in claim 1, wherein the depositing of an insulating layer comprises depositing a silicon dioxide layer.
3. The method as set forth in claim 1, wherein the depositing of a conducting layer on the insulating layer comprises:
depositing a first conducting layer on the insulating layer; and
depositing a second conducting layer on the first conducting layer.
4. The method as set forth in claim 3, wherein the depositing of a first conducting layer comprises depositing a platinum layer.
5. The method as set forth in claim 3, wherein the depositing of a first conducting layer comprises depositing an iridium layer.
6. The method as set forth in claim 3, wherein the depositing of a second conducting layer comprises depositing a layer of conducting oxide.
7. The method as set forth in claim 6, wherein the depositing of a layer of conducting oxide comprises depositing a layer of lanthanum nickel oxide (LaNiO3).
8. The method as set forth in claim 6, wherein the depositing of a layer of conducting oxide comprises depositing a layer of iridium oxide (IrO2).
9. The method as set forth in claim 7, wherein the depositing of a layer of lanthanum nitric oxide comprises depositing lanthanum nickel oxide by sputtering at a temperature of about 350 C.
10. The method as set forth in claim 7, wherein the depositing of a layer of lanthanum nickel oxide comprises causing the lanthanum nickel oxide to form a perovskite phase.
11. The method as set forth in claim 1, wherein the depositing of a ferroelectric layer comprises depositing a lead zirconate titanate layer.
12. The method as set forth in claim 11, wherein the depositing of a lead zirconate titanate layer comprises depositing a lead zirconate titanate layer using metal organic chemical vapor deposition.
13. The method as set forth in claim 11, wherein the depositing of a lead zirconate titanate layer comprises depositing a lead zirconate titanate layer using a process that operates at a temperature substantially in a range of about 450 C. to about 550 C.
14. A semiconductor element formed using the method of claim 1.
15. A semiconductor element formed using the method of claim 3.
16. A manufacturing method for fabricating a ferroelectric capacitor in an integrated circuit, the method comprising:
fabricating a metal-oxide-semiconductor transistor on a substrate;
depositing an insulating layer on the metal-oxide-semiconductor;
depositing a conducting layer on the insulating layer using a process to cause at least part of the conducting layer to form a perovskite phase; and
depositing a ferroelectric layer on the conducting layer using a process to cause at least part of the ferroelectric layer to form a perovskite phase.
17. The manufacturing method as set forth in claim 16, wherein the depositing of a conducting layer on the insulating layer comprises:
depositing a first conducting layer on the insulating layer; and
depositing a second conducting layer on the first conducting layer.
18. The manufacturing method as set forth in claim 16, wherein the depositing of a conducting layer on the insulating layer is performed using a low temperature process.
19. The manufacturing method as set forth in claim 18, wherein the depositing of a ferroelectric layer on the conducting layer is performed using a low temperature process.
20. A semiconductor element formed using a manufacturing method as set forth in claim 16.
21. A semiconductor element formed using a manufacturing method as set forth in claim 18.
22. The manufacturing method as set forth in claim 16, wherein the depositing of a ferroelectric layer comprises depositing a lead zirconate titanate layer.
23. A semiconductor element formed using a manufacturing method as set forth in claim 22.
24. A semiconductor element produced by the manufacturing method as set forth in claim 22, wherein the depositing of a lead zirconate titanate layer comprises depositing a lead zirconate titanate layer using metal organic chemical vapor deposition.
25. A semiconductor element produced by the manufacturing method as set forth in claim 22, wherein the depositing of a lead zirconate titanate layer comprises depositing a lead zirconate titanate layer using a process that operates at a temperature substantially in a range of about 450 C. to about 550 C.