1460894549-40298319-db88-4998-90ec-ac14833783c0

1. A vertical geometry light emitting diode capable of emitting light in the electromagnetic spectrum wherein said light emitting diode comprises:
a substrate;
a lift-off layer coated on said substrate comprising AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661;
a first doped layer on said lift-off layer wherein said first doped layer comprises AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661 and said first doped layer has a first conductivity;
a multilayer quantum well region on said first doped layer comprising alternating layers of:
a quantum well comprising AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, and 0<x+y\u22661; and
a barrier layer on each surface of said quantum well having a band gap larger than a quantum well bandgap and said barrier layer comprises AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661 and wherein said multilayer quantum well terminates with said barrier layer on each side thereof;
a second doped layer on said quantum well region wherein said second doped layer comprises AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661 and said second doped layer has a different conductivity and dopant type than said first doped layer;
a contact layer on said second doped layer comprising AlxInyGa1-x-yN wherein 0\u2266x\u22661, 0\u2266y\u22661, 0\u2266x+y\u22661 wherein said contact layer has a different conductivity than said second doped layer;
a first metallic contact formed on the backside of the first doped layer
a second metallic contact formed on the second doped contact layer in a vertical geometry orientation.
2. The vertical geometry light emitting diode of claim 1 wherein the lift-off layer comprises AlxInyGa1-x-yN wherein 0.01<x\u22661, 0\u2266y<1, 0.01<x+y\u22661.
3. The vertical geometry light emitting diode of claim 2 wherein the lift-off layer comprises AlxInyGa1-x-yN wherein 0.1<x\u22661, 0\u2266y<1, 0.1<x+y\u22661.
4. The vertical geometry light emitting diode of claim 3 wherein the lift-off layer comprises AlxInyGa1-x-yN wherein 0.25<x\u22661, 0\u2266y<1, 0.25<x+y\u22661.
5. The vertical geometry light emitting diode of claim 4 wherein the lift-off layer comprises AlxInyGa1-x-yN wherein 0.5<x\u22661, 0\u2266y<1, 0.5<x+y\u22661.
6. The vertical geometry light emitting diode of claim 5 wherein the lift-off layer comprises AlxInyGa1-x-yN wherein 0.9<x\u22661, 0\u2266y<1, 0.9<x+y\u22661.
7. The vertical geometry light emitting diode of claim 6 wherein the lift-off layer comprises AlxInyGa1-x-yN wherein 0.99<x\u22661, 0\u2266y<1, 0.99<x+y\u22661.
8. The vertical geometry light emitting diode of claim 1 wherein said lift-off layer is deposited in such a way that the group III and group V materials are injected via a pulsed growth method wherein the group III and group V materials do not have continuous flow, but are pulsed either sequentially, or such that the group III source pulses are partially on with no group V source pulse or partially overlap with a group V source pulse.
9. The vertical geometry light emitting diode of claim 1 further comprising a strain relief superlattice layer between said lift-off layer and said first doped layer wherein said strain relief superlattice layer comprises repeating periods of AlxInyGa1-x-yN and AlrInsGa1-r-sN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661, and 0<r\u22661, 0\u2266s<1, 0<r+s\u22661 and the bandgap of the two materials is not identical.
10. The vertical geometry light emitting diode of claim 9 wherein the strain relief superlattice is deposited in such a way that the group III and group V materials are injected via a pulsed growth method wherein the group III and group V materials do not have continuous flow, but are pulsed either sequentially, or such that the group III source pulses are partially on with no group V source pulse or partially overlap with the group V source pulse.
11. The vertical geometry light emitting diode of claim 9 wherein said strain relief superlattice layer is doped with at least one dopant selected from the group consisting of silicon, indium, oxygen and carbon.
12. The vertical geometry light emitting diode of claim 1 further comprising a strain relief superlattice layer between said lift-off layer and said first doped layer wherein said strain relief superlattice layer comprises repeating periods of AlxInyGa1-x-yN and AlrInsGa1-r-sN wherein 0.1\u2266x\u22661, 0\u2266y\u22661, 0.1\u2266x+y\u22661, and 0<r\u22661, 0\u2266s\u22661, 0<r+s\u22661 and the bandgap of the two materials is not identical.
13. The vertical geometry light emitting diode of claim 1 further comprising a strain relief superlattice layer between said lift-off layer and said first doped layer wherein said strain relief superlattice layer comprises repeating periods of AlxInyGa1-x-yN and AlrInsGa1-r-sN wherein 0.5\u2266x\u22661, 0\u2266y\u22661, 0.5\u2266x+y\u22661, and 0<r\u22661, 0\u2266s<1, 0<r+s\u22661 and the bandgap of the two materials is not identical.
14. The vertical geometry light emitting diode of claim 1 further comprising a strain relief superlattice layer between said lift-off layer and said first doped layer wherein said strain relief superlattice layer comprises repeating periods of AlxInyGa1-x-yN and AlrInsGa1-r-sN wherein 0.9\u2266x\u22661, 0\u2266y\u22661, 0.9\u2266x+y\u22661, and 0<r\u22661, 0\u2266s\u22661, 0<r+s\u22661 and the bandgap of the two materials is not identical.
15. The vertical geometry light emitting diode of claim 1 further comprising a strain relief superlattice layer between said lift-off layer and said first doped layer wherein said strain relief superlattice layer comprises repeating periods of AlxInyGa1-x-yN and AlrInsGa1-r-sN wherein 0.9\u2266x\u22661, 0\u2266y\u22661, 0.9\u2266x+y\u22661, and 0.1\u2266r\u22661, 0\u2266s\u22661, 0.1\u2266r+s\u22661 and the bandgap of the two materials is not identical.
16. The vertical geometry light emitting diode of claim 1 further comprising a strain relief superlattice layer between said lift-off layer and said first doped layer wherein said strain relief superlattice layer comprises repeating periods of AlxInyGa1-x-yN and AlrInsGa1-r-sN wherein 0.9\u2266x\u22661, 0\u2266y\u22661, 0.9\u2266x+y\u22661, and 0.3\u2266r\u22661, 0\u2266s\u22661, 0.3\u2266r+s\u22661 and the bandgap of the two materials is not identical.
17. The vertical geometry light emitting diode of claim 1 further comprising a strain relief superlattice layer between said lift-off layer and said first doped layer wherein said strain relief superlattice layer comprises repeating periods of AlxInyGa1-x-yN and AlrInsGa1-r-sN such that 0.9\u2266x\u22661, 0\u2266y\u22661, 0.9\u2266x+y\u22661, and 0.5\u2266r\u22661, 0\u2266s\u22661, 0.5\u2266r+s\u22661 and the bandgap of the two materials is not identical.
18. The vertical geometry light emitting diode of claim 1 further comprising a strain relief superlattice layer between said lift-off layer and said first doped layer wherein said strain relief superlattice layer comprises repeating periods of AlxInyGa1-x-yN and AlrInsGa1-r-sN such that 0.9\u2266x\u22661, 0\u2266y\u22661, 0.9\u2266x+y\u22661, and 0.7\u2266r\u22661, 0.7\u2266s\u22661, 0.7\u2266r+s\u22661 and the bandgap of the two materials is not identical.
19. The vertical geometry light emitting diode of claim 1 further comprising said a second doped layer and a first doped layer and said multiple quantum well comprising AlxInyGa1-x-yN wherein 0\u2266x\u22661, 0\u2266y\u22661, 0<x+y<1) wherein said first doped layer and a said second doped layer have a different composition.
20. The vertical geometry light emitting diode of claim 19 wherein said lift-off layer, said first doped layer, and said quantum well are all n-type doped layers.
21. The vertical geometry light emitting diode of claim 1 wherein said quantum well comprises a single quantum well and multiple quantum well layers.
22. The vertical geometry light emitting diode of claim 21 wherein said multiple quantum well comprises alternating layers of AlxGa1-xN, wherein 0\u2266x<1, and AlyGa1-yN wherein 0<y<1 and wherein x and y are not equal.
23. The vertical geometry light emitting diode of claim 22 wherein said quantum well is doped with at least one n-type dopant selected from silicon, indium and oxygen.
24. The vertical geometry light emitting diode of claim 22 wherein said quantum well is doped with at least one p-type dopant selected from magnesium, zinc and beryllium.
25. The vertical geometry light emitting diode of claim 22 wherein said quantum well is doped with at least one n-type and at least one p-type dopant.
26. The vertical geometry light emitting diode of claim 22 wherein said quantum well produces ultra-violet photons.
27. The vertical geometry light emitting diode of claim 26 wherein said multiple quantum well emits with a wavelength having a wavelength defined by 190 nm\u2266 \u2266369 nm.
28. The vertical geometry light emitting diode of claim 26 wherein said multiple quantum well emits with a wavelength having a wavelength defined by 190 nm\u2266 \u2266340 nm.
29. The vertical geometry light emitting diode of claim 26 wherein said multiple quantum well emits with a wavelength having a wavelength defined by 190 nm\u2266 \u2266310 nm.
30. The vertical geometry light emitting diode of claim 26 wherein said multiple quantum well emits with a wavelength having a wavelength defined by 190 nm\u2266 \u2266290 nm.
31. The vertical geometry light emitting diode of claim 26 wherein said multiple quantum well emits with a wavelength having a wavelength defined by 190 nm\u2266 \u2266270 nm.
32. The vertical geometry light emitting diode of claim 1 wherein said quantum well comprises non-radiative and radiative recombination of electrons and holes.
33. The vertical geometry light emitting diode of claim 1 wherein said multiple quantum comprises at least 2 quantum wells.
34. The vertical geometry light emitting diode of claim 33 wherein said multiple quantum well comprises at least 3 quantum wells.
35. The vertical geometry light emitting diode of claim 1 wherein said substrate comprises a material selected from the group consisting of silicon, AlxInyGa1x-yN wherein 0\u2266x\u22661, 0\u2266y\u22661, 0\u2266x+y\u22661), zinc oxide, gallium arsenide, silicon carbide, lithium aluminate, lithium gallate and sapphire.
36. The vertical geometry light emitting diode of claim 35 wherein said substrate is selected from polar, semi-polar and non-polar crystal orientations.
37. The vertical geometry light emitting diode of claim 36 wherein said substrate is patterned.
38. The vertical geometry light emitting diode of claim 1 further comprising a second doped layer between said quantum well region and a said contact layer wherein said second doped layer comprises AlxInyGa1-x-yN wherein 0<x\u20141, 0\u2266y\u22661, 0<x+y\u20141 and said second doped layer has a different conductivity and dopant type than said first doped layer;
39. The vertical geometry light emitting diode of claim 1 wherein said contact layer comprises of a p-type AlxGa1-xN layer wherein 0\u2266x\u22661.
40. The vertical geometry light emitting diode of claim 1 wherein said contact layer comprises of a p-type InxGa1-x-yN layer wherein 0\u2266x\u22661.
41. The vertical geometry light emitting diode of claim 1 wherein said contact layer comprises a p-type AlxInyGa1-x-yN wherein 0\u2266x\u22661, 0\u2266y\u22661, 0\u2266x+y\u22661 layer.
42. The vertical geometry light emitting diode of claim 1 wherein said contact layer comprises a p-type AlxInyGa1-x-yN, and AlrInsGa1-r-sN wherein 0\u2266x\u22661, 0\u2266y\u22661, 0\u2266x+y\u22661 and 0\u2266r\u22661, 0\u2266s\u22661, 0\u2266x+y\u22661 and the composition of the two layers is not
43. The vertical geometry light emitting diode of claim 1 wherein said first metallic contact consists of a) TiNmetal, b) AlxTiYN ternary compoundsmetal or c) low temperature GaNmetal or d) ITOmetal.
44. The vertical geometry light emitting diode of claim 1 wherein said second metallic contact is selected from the group consisting of PdNiAu and PdAgAuTiAu.
45. The vertical geometry light emitting diode of claim 1 wherein said device is packaged in a flip-chip package geometry.
46. The vertical geometry light emitting diode of claim 45 wherein said flip-chip device further comprises an epoxy under-fill.
47. The vertical geometry light emitting diode of claim 1 further comprising an epoxy dome.
48. The vertical geometry light emitting diode of claim 1 wherein said strain relief superlattice layer is directly on said substrate and said first doped layer is directly on said strain relieved superlattice layer with no additional layers there between.
49. A process for forming a vertical geometry light emitting diode capable of emitting light in the electromagnetic spectrum comprising:
a substrate;
a lift-off layer coated on said substrate comprising AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661;
a first doped layer on said lift-off layer wherein said first doped layer comprises AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661 and said first doped layer has a first conductivity;
a multilayer quantum well region on said first doped layer comprising alternating layers of:
a quantum well comprising AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, and 0<x+y\u22661; and
a barrier layer on each surface of said quantum well having a band gap larger than a quantum well bandgap and said barrier layer comprises AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661 and wherein said multilayer quantum well terminates with said barrier layer on each side thereof;
a second doped layer on said quantum well region wherein said second doped layer comprises AlxInyGa1-x-yN wherein 0<x\u22661, 0\u2266y\u22661, 0<x+y\u22661 and said second doped layer has a different conductivity and dopant type than said first doped layer;
a contact layer on said second doped layer comprising AlxInyGa1-x-yN wherein 0\u2266x\u22661, 0\u2266y\u22661, 0\u2266x+y\u22661 wherein said contact layer has a different conductivity than said second doped layer;
a first metallic contact formed on the backside of the first doped layer a second metallic contact formed on the second doped contact layer in a vertical geometry orientation.
50. The process for forming a vertical geometry light emitting device of claim 49 wherein said layers are grown by at least one method selected from the group consisting of metal organic chemical vapor deposition, molecular beam epitaxy, hydride vapor phase epitaxy, or metalorganic hydride vapor phase epitaxy.
51. The process for forming a vertical geometry light emitting diode of claim 49 wherein said lift-off layer is deposited in such a way that the group III and group V materials are injected via a pulsed growth method wherein the group III and group V materials do not have continuous flow, but are pulsed either sequentially, or such that the group III source pulses are partially on with no group V source pulse or partially overlap with a group V source pulse.
52. The process of forming a vertical geometry light emitting diode of claim 49 wherein the strain relief superlattice is deposited in such a way that the group III and group V materials are injected via a pulsed growth method wherein the group III and group V materials do not have continuous flow, but are pulsed either sequentially, or such that the group III source pulses are partially on with no group V source pulse or partially overlap with the group V source pulse.
53. The process for forming a vertical geometry light emitting device of claim 49 further comprising treating said substrate to add porosity.
54. The process for forming a vertical geometry light emitting device of claim 53 wherein said porosity is added in-situ.
55. The process for forming a vertical geometry light emitting device of claim 49 wherein at least one layer is grown with a method selected from pulsed lateral overgrowth, pulsed atomic layer epitaxy and cyclic atomic layer epitaxy.
56. The process for forming a vertical geometry light emitting device of claim 49 further comprising formation of isolation deep trenches that extend from the epitaxial surface to at least the surface of said substrate.
57. The process for forming a vertical geometry light emitting device of claim 56 wherein said formation of isolation deep trenches is by ICP-RIE or RIE etching.
58. The process for forming a vertical geometry light emitting device of claim 56 wherein said formation of isolation deep trenches is by Photo-electrical chemical etching.
59. The process for forming a vertical geometry light emitting device of claim 56 wherein said isolation deep trenches contain a polymer.
60. The process for forming a vertical geometry light emitting device of claim 59 wherein said polymer is selected from the group consisting of re-flow photo-resist SU-8, Spin on Glass (SOG), and benzo-cyclo-butene.
61. The process for forming a vertical geometry light emitting device of claim 56 wherein said isolation deep trenches contain a dielectric.
62. The process for forming a vertical geometry light emitting device of claim 61 wherein said dielectric is deposited using a low temperature plasma enhanced chemical vapor deposition.
63. The process for forming a vertical geometry light emitting device of claim 61 wherein said dielectric is deposited using digital dielectric deposition technique utilizing conventional plasma enhanced chemical vapor deposition system (PECVD)
64. The process for forming a vertical geometry light emitting device of claim 61 wherein said dielectric is deposited using low temperature digital dielectric deposition technique utilizing conventional plasma enhanced chemical vapor deposition system (PECVD) but is not limited thereto and can be deposited using electron-beam evaporation, sputtering technique.
65. The process for forming a vertical geometry light emitting device of claim 61 wherein said dielectric is deposited using precursors such as ammonia, silane, di-silane, di-ethyl silane, tetra-ethyl ortho silicate, oxygen, nitrous oxide and helium.
66. The process for forming a vertical geometry light emitting device of claim 49 further comprising removing said substrate by a laser assisted lift-off process.
67. The process for forming a vertical geometry light emitting device of claim 66 wherein said substrate is removed by a laser assisted lift-off process using a 248 nm laser.
68. The process for forming a vertical geometry light emitting device of claim 66 wherein said substrate is removed by a laser assisted lift-off process using a 193 nm laser.
69. The process for forming a vertical geometry light emitting device of claim 66 further comprising dipping said substrate in an acid solution selected from hydrochloric, phosphoric and sulphuric.
70. The process for forming a vertical geometry light emitting device of claim 66 further comprising dipping said substrate in a base solution selected from potassium hydroxide, ammonium hydroxide and hydrogen peroxide.
71. The process for forming a vertical geometry light emitting device of claim 66 further comprising roughening a back side epilayer by a surface treatment selected from RIE, ICP and chemical etching to increase light extraction, after substrate removal.
72. The process for forming a vertical geometry light emitting device of claim 66 further comprising adding a carrier having an electroplated gold layer with a thickness of at least 2 \u03bcm to no more than 45 \u03bcm.
73. The process for forming a vertical geometry light emitting device of claim 49 such that backside material is removed after the substrate lift-off process, such that the n-type first contact layer is exposed.
74. The process for forming a vertical geometry light emitting device of claim 73 such that the backside material is removed via one or more of the following methods, ICP etching, RIE etching, lap and polish methods, or photoelectric chemical etching.
75. The process for forming a vertical geometry light emitting device of claim 49 such that the back side first metallic n-contact consists of a) TiNmetal, b) AlXTiYN ternary compoundsmetal or c) low temperature GaNmetal or d) ITOmetal which are deposited by e-beam evaporation, or sputtering.
76. The process for forming a vertical geometry light emitting diode of claim 49 wherein said second metallic contact is selected from the group consisting of PdNiAu and PdAgAuTiAu and is deposited by e-beam evaporation, sputter, or thermal evaporation.
77. The process for forming a vertical geometry light emitting device of claim 76 further comprising annealing said metallic contact in an atmosphere selected from nitrogen ambient, oxygen ambient, air ambient and forming gas ambient.
78. The process for forming a vertical geometry light emitting device of claim 49 wherein said device is flip chip bonded to a thermally conductive submount.
79. The process for forming a vertical geometry light emitting device of claim 78 wherein said flip-chip device further comprises an epoxy under-fill.
80. The process for forming a vertical geometry light emitting device of claim 49 wherein said flip-chip device further comprises an epoxy dome that seals the LED from the ambient environment.
81. The process for forming a vertical geometry light emitting device of claim 80 wherein said epoxy dome is a mixture of silicone elastomers.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A system for retrieving an implantable LAA occlusion device, comprising:
a delivery catheter having a proximal end and a distal end;
said delivery catheter adapted for engagement at the distal end of said catheter with an implantable LAA occlusion device of the type having barbs on its exterior surface;
a recapture section axially movable with respect to said delivery catheter and also extendable from the distal end of the delivery catheter;
said recapture section including an extendable mesh sock anchored at a first end to a sock attachment section and connected on a second end to a petal carrier connected to a petal;
said petal carrier adapted for reciprocating motion inside a sheath;
a sheath having a proximal end and a distal end and a lumen sized to receive the delivery catheter, a portion of the lumen of the sheath being operable from an enlarged inside diameter to a reduced inside diameter to apply an inwardly directed force to the recapture section, such that proximal motion of the sheath enlarges the recapture section;
said petal carrier adapted to emerge from said sheath when said sheath is in the enlarged state;
said petal adapted to flare and extend radially and be fixed to said sheath when said sheath is in the reduced diameter state;
thereby permitting the sheath to advance said petal toward said LAA occlusion device;
said sock attachment section adapted to apply traction to said petal carrier thereby applying a force to engage said petals with said barbs.
2. The system of claim 1, further comprising an implant releasably engageable with the delivery catheter.
3. The system of claim 2, wherein the implant comprises at least one anchor and is adjustable from an enlarged diameter to a reduced diameter, and wherein the recapture section is configured to cover the at least one anchor when axially extended from the distal end of the delivery catheter.
4. The system of claim 1, wherein the recapture section has reduced configuration and an enlarged configuration capable of receiving at least a portion of the implantable device.
5. The system of claim 1, further comprising an implant actuation shaft, wherein the delivery catheter comprises a lumen extending along the delivery catheter’s longitudinal axis, and wherein the implant actuation shaft is disposed at least partially within the lumen.
6. The system of claim 5, further comprising an implant having a distal end in contact with the implant actuation shaft.
7. The system of claim 1, wherein the sheath comprises a balloon.