1. A modulation system generating and receiving an analog input signal from an input sensor, said modulation system comprising:
a switched excitation circuit coupled to excite said input sensor for generating an input voltage step;
an integrator receiving said input voltage step through AC coupling and receiving a reference charge packet generated in response to a data dependent signal, said integrator integrating a charge indicative of the sum of an input charge associated with said input voltage step AC coupled to said integrator and said reference charge packet, said input charge and said reference charge packet having reverse polarities, and said integrator generating an integrator output signal; and
a comparator having an input terminal coupled to receive a signal corresponding to said integrator output signal and comparing said integrator output signal to a reference level to generate a digital output signal at an output terminal, said data dependent signal having a value corresponding to said digital output signal,
wherein said data dependent signal causes said reference charge packet to be generated synchronously with the excitation of said input sensor when said data dependent signal has a first value and causes no reference charge packet to be generated when said data dependent signal has a second value; and
wherein said digital output signal forms a digital data stream over a plurality of sampling cycles, said digital data stream having an ones density proportional to a magnitude of said input voltage step.
2. The modulation system of claim 1, wherein said integrator comprises an input capacitor coupled to an amplifier, such that when said integrator is operated in a correlated double sampling mode, said amplifier is shorted out to store an amplifier error voltage onto said input capacitor.
3. The modulation system of claim 1, wherein said comparator further comprises a second input terminal coupled to receive a reference voltage as said reference level.
4. The modulation system of claim 1, wherein said reference charge packet is generated in response to said data dependent signal and based on a first voltage, said input charge being associated with a rising edge of said input voltage step and said reference charge packet being associated with a falling edge of said first voltage, said integrator integrates charges associated with said input charge having positive magnitude when no reference charge packet is applied or integrates charges associated with the sum of said input charge having positive magnitude and said reference charge packet having negative magnitude when said reference charge packet is applied.
5. The modulation system of claim 1, wherein said reference charge packet is generated in response to said data dependent signal and based on a first voltage, said input charge being associated with a falling edge of said input voltage step and said reference charge packet being associated with a rising edge of said first voltage, said integrator integrates charges associated with said input charge having negative magnitude when no reference charge packet is applied or integrates charges associated with the sum of said input charge having negative magnitude and said reference charge packet having positive magnitude when said reference charge packet is applied.
6. A modulation system generating and receiving an analog input signal from an input sensor, said modulation system comprising:
a switched excitation circuit coupled to excite said input sensor for generating an input voltage step;
an integrator coupled to sample said input voltage step synchronously with the excitation of said input sensor and to generate an integrator output signal, said integrator comprising:
an input capacitor having a first terminal coupled to said input sensor and a second terminal, said input voltage step being AC coupled through said input capacitor to form an input charge corresponding to the magnitude of said input voltage step;
an amplifier having a first input terminal coupled to said second terminal of said input capacitor and an output terminal;
an accumulation capacitor having a first terminal coupled to said first input terminal of said amplifier and a second terminal providing said integrator output signal;
a first switch coupled between said first input terminal and said output terminal of said amplifier, said first switch being controlled by a first clock signal;
a second switch coupled between said second terminal of said accumulation capacitor and said output terminal of said amplifier, said second switch being controlled by a second clock signal being complementary to the first clock signal; and
a charge packet generator circuit generating a reference charge packet in response to a data dependent signal and synchronously with the excitation of said input sensor, said reference charge packet having a polarity reverse to that of said input charge, said reference charge packet being coupled to said first input terminal of said amplifier; and
a comparator having an input terminal coupled to receive a signal corresponding to said integrator output signal and comparing said integrator output signal to a reference level to generate an output signal at an output terminal, said data dependent signal having a value corresponding to said output signal of said comparator,
wherein said data dependent signal causes said reference charge packet to be generated synchronously with the excitation of said input sensor when said data dependent signal has a first value and causes no reference charge packet to be generated when said data dependent signal has a second value; and
wherein said output signal forms a digital data stream over a plurality of sampling cycles, said digital data stream having an ones density proportional to a magnitude of said input voltage step.
7. The modulation system of claim 6, wherein said first switch is closed and said second switch is open to operate said integrator in a correlated double sampling mode for enabling said amplifier to store an amplifier error voltage onto said input capacitor.
8. The modulation system of claim 7, wherein said amplifier error voltage comprises an amplifier offset voltage, 1f noise and wideband amplifier noise, and wherein said correlated double sampling mode operates to cancel essentially all of said amplifier offset voltage, said 1f noise, and partially cancel said wideband amplifier noise.
9. The modulation system of claim 6, wherein said integrator further comprises a buffer having an input terminal coupled to said second terminal of said accumulation capacitor and an output terminal coupled to said input terminal of said comparator, said comparator receiving an input signal corresponding to said integrator output signal.
10. The modulation system of claim 9, wherein said buffer comprises an inverting buffer having a gain of \u2212K.
11. The modulation system of claim 6, further comprising:
a logic circuit for generating said data dependent signal, said logic circuit receiving an input signal corresponding to said output signal and a third clock signal,
wherein said third clock signal is also coupled to drive said switched excitation circuit so that said reference charge packet, when applied, is generated synchronously with the excitation of said input sensor.
12. The modulation system of claim 6, wherein said integrator integrates a charge indicative of the sum of said input charge and said reference charge packet, said charge indicative of said sum being stored on said accumulation capacitor in said integrator.
13. The modulation system of claim 6, wherein said amplifier comprises an operational amplifier having an inverting input terminal being said first input terminal, a non-inverting input terminal coupled to a ground or reference potential and an output terminal being said output terminal of said amplifier.
14. The modulation system of claim 6, wherein said comparator further comprises a second input terminal coupled to receive a reference voltage as said reference level.
15. The modulation system of claim 6, wherein each of said first switch and said second switch comprises a self-bootstrapping constant on-resistance switch circuit.
16. The modulation system of claim 6, wherein said reference charge packet is generated in response to said data dependent signal and based on a first voltage, said input charge being associated with a rising edge of said input voltage step and said reference charge packet being associated with a falling edge of said first voltage, said integrator integrates charges associated with said input charge having positive magnitude when no reference charge packet is applied or integrates charges associated with the sum of said input charge having positive magnitude and said reference charge packet having negative magnitude when said reference charge packet is applied.
17. The modulation system of claim 6, wherein said reference charge packet is generated in response to said data dependent signal and based on a first voltage, said input charge being associated with a falling edge of said input voltage step and said reference charge packet being associated with a rising edge of said first voltage, said integrator integrates charges associated with said input charge having negative magnitude when no reference charge packet is applied or integrates charges associated with the sum of said input charge having negative magnitude and said reference charge packet having positive magnitude when said reference charge packet is applied.
18. The modulation system of claim 6, wherein said switched excitation circuit comprises a switched current circuit.
19. The modulation system of claim 6, wherein said switched excitation circuit comprises a switched voltage circuit.
20. A modulator receiving an input voltage step from an input sensor, said modulator comprising:
an integrator coupled to sample said input voltage step synchronously with the excitation of said input sensor and to generate an integrator output signal, said integrator comprising:
an input capacitor having a first terminal coupled to said input sensor and a second terminal, said input voltage step being AC coupled through said input capacitor to form an input charge corresponding to the magnitude of said input voltage step;
an amplifier having a first input terminal coupled to said second terminal of said input capacitor and an output terminal;
an accumulation capacitor having a first terminal coupled to said first input terminal of said amplifier and a second terminal providing said integrator output signal;
a first switch coupled between said first input terminal and said output terminal of said amplifier, said first switch being controlled by a first clock signal;
a second switch coupled between said second terminal of said accumulation capacitor and said output terminal of said amplifier, said second switch being controlled by a second clock signal being complementary to the first clock signal; and
a charge packet generator circuit generating a reference charge packet in response to a data dependent signal and synchronously with the excitation of said input sensor, said reference charge packet having a polarity reverse to that of said input charge, said reference charge packet being coupled to said first input terminal of said amplifier; and
a comparator having an input terminal coupled to receive a signal corresponding to said integrator output signal, said comparator comparing said integrator output signal to a reference level to generate an output signal at an output terminal, said data dependent signal having a value corresponding to said output signal of said comparator,
wherein said data dependent signal causes said reference charge packet to be generated synchronously with the excitation of said input sensor when said data dependent signal has a first value and causes no reference charge packet to be generated when said data dependent signal has a second value; and
wherein said output signal forms a digital data stream over a plurality of sampling cycles, said digital data stream having an ones density proportional to a magnitude of said input voltage step.
21. The modulator of claim 20, wherein said first switch is closed and said second switch is open to operate said integrator in a correlated double sampling mode for enabling said amplifier to store an amplifier error voltage onto said input capacitor.
22. The modulator of claim 20, further comprising:
a logic circuit for generating said data dependent signal, said logic circuit receiving an input signal corresponding to said output signal and a third clock signal,
wherein said third clock signal is synchronous with the excitation of said input sensor so that said reference charge packet, when applied, is generated at the same time as said input voltage step.
23. The modulator of claim 20, wherein said integrator integrates a charge indicative of the sum of said input charge and said reference charge packet, said charge indicative of said sum being stored on said accumulation capacitor in said integrator.
24. The modulator of claim 20, wherein said reference charge packet is generated in response to said data dependent signal and based on a first voltage, said input charge being associated with a rising edge of said input voltage step and said reference charge packet being associated with a falling edge of said first voltage, said integrator integrates charges associated with said input charge having positive magnitude when no reference charge packet is applied or integrates charges associated with the sum of said input charge having positive magnitude and said reference charge packet having negative magnitude when said reference charge packet is applied.
25. The modulator of claim 20, wherein said reference charge packet is generated in response to said data dependent signal and based on a first voltage, said input charge being associated with a falling edge of said input voltage step and said reference charge packet being associated with a rising edge of said first voltage, said integrator integrates charges associated with said input charge having negative magnitude when no reference charge packet is applied or integrates charges associated with the sum of said input charge having negative magnitude and said reference charge packet having positive magnitude when said reference charge packet is applied.
26. The modulator of claim 20, wherein said amplifier comprises an operational amplifier having an inverting input terminal being said first input terminal, a non-inverting input terminal coupled to a ground or reference potential and an output terminal being said output terminal of said amplifier.
27. The modulator of claim 20, wherein said comparator further comprises a second input terminal coupled to receive a reference voltage as said reference level.
28. A method for sampling and digitizing an analog input data source from an input sensor, comprising:
applying a switched excitation source to said input sensor;
generating an input voltage step at said input sensor as a result of said application of said switched excitation source;
AC coupling said input voltage step to an integrator to form an input charge;
generating a data dependent signal having a first value and a second value;
generating a reference charge packet synchronously with said input voltage step when said data dependent signal has said first value;
coupling said reference charge packet to said integrator;
integrating charges corresponding to the sum of said input charge and said reference charge packet onto an accumulation capacitor, said input charge and said reference charge packet having reverse polarities;
comparing a signal corresponding to said charges accumulated on said accumulation capacitor with a reference voltage level; and
generating an output signal as a result of said comparing, said data dependent signal having said first value and said second value corresponding to respective logical levels of said output signal,
wherein after a plurality of sampling cycles, said output signal forms a digital data stream having an ones density proportional to a magnitude of said input voltage step.
29. The method of claim 28, further comprising:
in response to a first clock signal deactivating said integrator and operating said integrator in a correlated double sampling mode, said deactivating and operating comprising:
shorting out an amplifier in said integrator; and
storing an amplifier error voltage onto an input capacitor of said integrator, said amplifier error voltage comprising an amplifier offset voltage, 1f noise and wideband amplifier noise.
30. The method of claim 28, wherein said comparing comprises:
coupling an inverting buffer to said accumulation capacitor;
generating at an output terminal of said inverting buffer a voltage corresponding to an inverted voltage value corresponding to said charges accumulated on said accumulation capacitor; and
comparing said voltage at said output terminal of said inverting buffer with said reference voltage level.
31. The method of claim 28, wherein said AC coupling said input voltage step to an integrator comprises:
coupling said input voltage step to a first terminal of an input capacitor of said integrator;
coupling a second terminal of said input capacitor to an input terminal of an amplifier and a first terminal of said accumulation capacitor, said accumulation capacitor being coupled between said input terminal and an output terminal of said integrator.
32. The method of claim 28, wherein AC coupling said input voltage step to an integrator to form an input charge comprises AC coupling a rising edge of said input voltage step for forming a positive input charge; and wherein generating a reference charge packet synchronously with said input voltage step comprises generating a negative reference charge packet based on a falling edge of a first voltage.
33. Thc method of claim 28, wherein AC coupling said input voltage step to an integrator to form an input charge comprises AC coupling a falling edge of said input voltage step for forming a negative input charge; and wherein generating a reference charge packet synchronously with said input voltage step comprises generating a positive reference charge packet based on a rising edge of a first voltage.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A vending machine comprising:
a product transport and delivery system mounted within a cabinet and configured to receive a product from one of a plurality of product queues and to transport the received product toward a dispensing chamber within the cabinet, the product transport and delivery system including a product catcher selectively movable between a product receiving position and a product delivery position, the product catcher configured to receive the product from the product queue while in the product receiving position and shift to the product delivery position prior to or while releasing the received product into the dispensing chamber;
a portal between a product storage zone within which the product queues are disposed within the cabinet and the dispensing chamber;
a product holder mounted in the dispensing chamber; and
a shield member rotatable between a product dispensing position, wherein the product holder is open to the portal for transfer of a product from the product catcher while access to the dispensing chamber from outside the cabinet is blocked by the shield member, and a product delivery position, wherein the shield member blocks access through the portal to the product holder while the product holder is accessible to a customer from outside the cabinet, allowing the consumer to retrieve a product from the dispensing chamber.
2. The vending machine according to claim 1, wherein the product holder rotates with the shield member.
3. The vending machine according to claim 1, wherein the product catcher shifts to the product delivery position while releasing the received product into the dispensing chamber.
4. The vending machine according to claim 1, wherein the product transport and delivery system includes a carriage rail, the product catcher moves vertically along the carriage rail, and the carriage rail moves horizontally.
5. The vending machine according to claim 1, wherein the shield member, in the product delivery position, blocks access to the product storage zone through the portal from outside the cabinet.
6. The vending machine according to claim 1, wherein products are carried by the product catcher and held by the product holder in upright orientation.
7. The vending machine according to claim 1, wherein the product holder is located below the portal, and wherein products slide from the product catcher through the portal into the product holder.
8. The vending machine according to claim 1, wherein the shield member is maintained in the product dispensing position during transfer of a product from a product queue to the product catcher and during transfer of the product from the product catcher to the product holder.
9. The vending machine according to claim 1, further comprising:
a sensor configured to detect presence of a product within the product holder, wherein the shield member is rotated from the product dispensing position to the product delivery position based upon detection of a product within the product holder by the sensor.
10. The vending machine according to claim 1, wherein the shield member includes a curved, transparent surface.
11. A method of operating a vending machine comprising:
receiving a product from one of a plurality of product queues within a cabinet in a product catcher;
transporting the received product in the product catcher toward a dispensing chamber within the cabinet, wherein the product catcher is selectively movable between a product receiving position and a product delivery position, the product catcher receiving the product from the product queue while in the product receiving position and shifting to the product delivery position prior to or while releasing the received product into the dispensing chamber;
transferring the product from the product catcher through a portal between a product storage zone within which the product queues are disposed within the cabinet to a product holder mounted in the dispensing chamber; and
rotating a shield member between a product dispensing position, wherein the product holder is open to the portal for transfer of a product from the product catcher while access to the dispensing chamber from outside the cabinet is blocked by the shield member, and a product delivery position, wherein the shield member blocks access through the portal to the product holder while the product holder is accessible to a customer from outside the cabinet, allowing the consumer to retrieve a product from the dispensing chamber.
12. The method of claim 11, further comprising:
rotating the product holder with the shield member.
13. The method of claim 12, further comprising:
shifting the product catcher to the product delivery position while releasing the received product into the dispensing chamber.
14. The method of claim 12, further comprising:
moving the product catcher vertically along a carriage rail; and
moving the carriage rail horizontally.
15. The method of claim 12, wherein the shield member, in the product delivery position, blocks access to the product storage zone through the portal from outside the cabinet.
16. The method of claim 12, wherein products are carried by the product catcher and held by the product holder in upright orientation.
17. The method of claim 12, wherein the product holder is located below the portal, the method further comprising:
sliding products from the product catcher through the portal into the product holder.
18. The method of claim 12, further comprising:
maintaining the shield member in the product dispensing position during transfer of a product from a product queue to the product catcher and during transfer of the product from the product catcher to the product holder.
19. The method of claim 12, further comprising:
detecting presence of a product within the product holder with a sensor;
rotating the shield member from the product dispensing position to the product delivery position based upon detection of a product within the product holder by the sensor.
20. The method of claim 12, wherein the shield member includes a curved, transparent surface.