1. A cleaning unit comprising:
a cleaning member that is formed in the shape of a plate having an end portion coming into contact with a surface of an image carrier, and cleans the surface of the image carrier;
a cleaning container that stores developer removed by the cleaning member;
a cleaning support that is formed by bending a plate and includes a cleaning-supporting portion supporting the other end portion of the cleaning member and a supported portion angled with respect to the cleaning-supporting portion by bending;
a supporting-portion-of-support that includes a facing portion facing the supported portion, is provided at the cleaning container, and supports the cleaning support;
a damping member that is disposed between the supported portion and the facing portion, is formed so as to be elastically deformable, and regulates vibration of the cleaning member; and
a securing member that secures the cleaning support to the supporting-portion-of-support at a position adjacent to the damping member.
2. The cleaning unit according to claim 1, wherein
the supported portion is provided with a first opening;
the facing portion is provided with a second opening that is formed at a position corresponding to the first opening; and
the securing member includes one end portion engaged with the first opening, the other end portion engaged with the second opening, and a stepped portion disposed between the one end portion and the other end portion and having a diameter that is smaller than a diameter of one of the first opening and the second opening, which is larger than the other, and is larger than a diameter of the other of the first opening and the second opening, which is smaller than the other, the securing member securing the cleaning support to the supporting-portion-of-support with a preset gap while one end of the stepped portion comes into contact with an edge of the other and the damping member is compressed according to the length of the stepped portion in a direction where the one end and the other end of the stepped portion are connected to each other, when the one end portion and the other end portion are engaged with the first opening and the second opening, respectively.
3. The cleaning unit according to claim 1, wherein
the supporting-portion-of-support includes the facing portion, a first portion that is formed by bending the supporting portion at an end portion of the facing portion, and a second portion that is formed by bending the supporting portion at an end portion of the first bent portion opposite to the end portion of the facing portion.
4. The cleaning unit according to claim 1, wherein
the damping member includes a first contact portion that comes into contact with a surface of the supported portion facing the facing portion, and a second contact portion that comes into contact with a surface of the supported portion that is opposite to the cleaning-supporting portion.
5. The cleaning unit according to claim 1, wherein
the stiffness of the facing portion is lower than the stiffness of the supported portion.
6. An image carrier unit comprising:
an image carrier that carries an image formed on a surface thereof with developer; and
a cleaning unit that cleans the surface of the image carrier by removing the developer adhering to the surface of the image carrier,
the cleaning unit comprising:
a cleaning member that is formed in the shape of a plate having an end portion coming into contact with the surface of the image carrier, and cleans the surface of the image carrier;
a cleaning container that stores developer removed by the cleaning member;
a cleaning support that is formed by bending a plate and includes a cleaning-supporting portion supporting the other end portion of the cleaning member and a supported portion angled with respect to the cleaning-supporting portion by bending;
a supporting-portion-of-support that includes a facing portion facing the supported portion, is provided at the cleaning container, and supports the cleaning support;
a damping member that is disposed between the supported portion and the facing portion, is formed so as to be elastically deformable, and regulates vibration of the cleaning member; and
a securing member that secures the cleaning support to the supporting-portion-of-support at a position adjacent to the damping member.
7. An image forming apparatus comprising:
an image carrier that is rotated;
a charger that charges a surface of the image carrier;
a latent image writing unit that writes a latent image on the image carrier;
a developing unit that develops the latent image, which is formed on the surface of the image carrier, into a visible image;
a transfer unit that transfers the visible image, which is formed on the surface of the image carrier, to a body to which an image is to be transferred; and
a cleaning unit that cleans the surface of the image carrier by removing the developer adhering to the surface of the image carrier after transfer,
the cleaning unit comprising:
a cleaning member that is formed in the shape of a plate having an end portion coming into contact with the surface of the image carrier, and cleans the surface of the image carrier;
a cleaning container that stores developer removed by the cleaning member;
a cleaning support that is formed by bending a plate and includes a cleaning-supporting portion supporting the other end portion of the cleaning member and a supported portion angled with respect to the cleaning-supporting portion by bending;
a supporting-portion-of-support that includes a facing portion facing the supported portion, is provided at the cleaning container, and supports the cleaning support;
a damping member that is disposed between the supported portion and the facing portion, is formed so as to be elastically deformable, and regulates vibration of the cleaning member; and
a securing member that secures the cleaning support to the supporting-portion-of-support at a position adjacent to the damping member.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for fabricating a memory cell, comprising:
forming a first conductive line and a first diode component on a substrate sequentially;
forming a dielectric layer on the substrate with an opening exposing the first diode component on the first conductive line;
forming a stack filling the opening, comprising a second diode component, a buffer layer and an anti-fuse layer; and
forming a second conductive line on the dielectric layer, connecting the stack and generally perpendicularly to the first conductive line.
2. The method according to claim 1, wherein the first andor second conductive layer comprise a TiN barrier layer and a tungsten layer.
3. The method according to claim 1, wherein the stack is formed by the steps of:
filling the opening with silicon to form a silicon column;
performing an ion implantation to the silicon column to form a heavier doped upper portion of the silicon column as the buffer layer and a lightly doped lower portion of the silicon column as the second diode component; and
forming the anti-fuse layer in the opening, on the buffer layer or beneath the second diode component.
4. The method according to claim 3, wherein the first diode component comprises p-type doped silicon and the second diode component comprises n-type doped silicon.
5. The method according to claim 3, wherein the anti-fuse layer comprises an insulating layer formed on the buffer layer in contact with the second conductive line, or beneath the second diode component in contact with the first diode component.
6. A method for fabricating a memory cell, comprising:
forming a first conductive line in a first dielectric layer on a substrate, exposing a surface of the first conductive line;
forming a first column comprising a first diode component on the exposed first conductive layer;
forming a second dielectric layer covering the first dielectric layer and the first conductive line and the first diode component with an opening exposing the first column;
forming a second column filling the opening, comprising a second diode component, a buffer layer and an anti-fuse layer; and
forming a second conductive line on the second dielectric layer, connecting the second column and generally perpendicularly to the first conductive line.
7. The method according to claim 6, wherein the first andor second conductive line comprise a TiN barrier layer and a tungsten layer.
8. The method according to claim 6, wherein the second diode component and the buffer layer are formed by the steps of:
filling the opening with silicon to form a silicon column; and
performing an ion implantation on the silicon column to form a heavier doped upper portion of the silicon column as the buffer layer and a lightly doped lower portion of the silicon column as the second diode component.
9. The method according to claim 8, wherein the first diode component comprises p-type doped silicon and the second diode component comprises n-type doped silicon.
10. The method according to claim 6, wherein the anti-fuse layer comprises an insulating layer formed on the buffer layer in contact with the second conductive line, or beneath the second diode component in contact with the first diode component.
11. A memory cell, comprising:
a first line on a substrate, comprising a first conductive line and a first diode component on the first conductive line;
a stack on the first line, comprising an anti-fuse layer, a second diode component and a buffer layer on the second diode component; and
a second conductive line on the stack, generally perpendicularly to the first line.
12. The memory cell according to claim 11, wherein the anti-fuse layer is disposed on the buffer layer in contact with the second conductive line.
13. The memory cell according to claim 11, wherein the anti-fuse layer is disposed on the bottom of the stack in contact with the first line.
14. The memory cell according to claim 11, wherein the first diode component comprises first-type doped semiconductor, the second diode component comprises lightly second-type doped semiconductor, and the buffer layer comprises heavily second-type doped semiconductor.
15. The memory cell according to claim 11, wherein the anti-fuse layer comprises an insulating layer.
16. A memory cell, comprising:
a first conductive line on a substrate;
a stack on the first conductive line, comprising an anti-fuse layer, a first diode component, a second diode component on the first diode component and a buffer layer on the second diode component; and
a second conductive line on the stack, generally perpendicularly to the first conductive line.
17. The memory cell according to claim 16, wherein the anti-fuse layer is disposed on the buffer layer in contact with the second conductive line.
18. The memory cell according to claim 16, wherein the anti-fuse layer is disposed on the bottom of the stack in contact with the first conductive line.
19. The memory cell according to claim 16, wherein the first diode component comprises first-type doped semiconductor, the second diode component comprises lightly second-type doped semiconductor, and the buffer layer comprises heavily second-type doped semiconductor.
20. A memory cell, comprising:
a first line on a substrate, comprising a first conductive line, an anti-fuse line and a first diode component on the first conductive line;
a stack on the first line, comprising a second diode component and a buffer layer on the second diode component; and
a second conductive line on the stack, generally perpendicularly to the first line.
21. The memory cell according to claim 20, wherein the anti-fuse line is interposed between the first diode component and the first conductive line.
22. The memory cell according to claim 20, wherein the first diode component comprises first-type doped semiconductor, the second diode component comprises lightly second-type doped semiconductor, and the buffer layer comprises heavily second-type doped semiconductor.
23. The memory cell according to claim 20, wherein the anti-fuse layer is an insulating layer.