1. An apparatus, comprising:
a texture state cache that includes a plurality of entries configured to store state information relating to one or more textures stored by the apparatus; and
texture processing circuitry configured to retrieve state information for a particular one of the stored textures from one of the plurality of entries in the texture state cache and to determine pixel attributes based on the particular texture and the retrieved state information.
2. The apparatus of claim 1, wherein the state information includes texture state information that indicates properties of the particular texture and is usable to access the particular texture based on received texture coordinates.
3. The apparatus of claim 1, wherein the state information includes sampler state information that indicates how to determine pixel attributes based on texel information retrieved from the particular texture.
4. The apparatus of claim 1, wherein the texture processing circuitry is configured to pipeline an index of the one of the plurality of entries of the texture state cache but not pipeline the state information.
5. The apparatus of claim 1,
wherein the texture state cache includes multiple read ports; and
wherein the texture processing circuitry includes multiple pipeline stages configured to access the texture state cache in the same cycle using the multiple read ports.
6. The apparatus of claim 1, wherein entries in the texture state cache are implemented using at least one of flip-flops and latches.
7. The apparatus of claim 1, further comprising:
a shared memory;
wherein each of the plurality of entries in the texture state cache is associated with a respective tag, wherein the tag corresponds to a location in the shared memory of state information stored in the entry.
8. The apparatus of claim 7, wherein each of the plurality of entries includes a valid field, wherein the apparatus is configured to indicate that an entry of the plurality of entries is invalid in response to modification of a corresponding location in the shared memory.
9. The apparatus of claim 1, further comprising:
a texture cache configured to store the one or more textures.
10. The apparatus of claim 1, further comprising:
a pending counter associated with each of the plurality of entries;
wherein the apparatus is configured to:
send a texture operation to the texture processing circuitry, wherein the texture operation indicates an entry of the texture state cache;
increment a pending counter for the entry in response to sending the texture operation; and
decrement the pending counter in response to completion of the texture operation.
11. The apparatus of claim 10, wherein the apparatus is configured to select a victim entry of the texture state cache to store new state information based on one or more of the pending counters.
12. The apparatus of claim 1, further comprising:
interface circuitry between a shared memory and the texture state cache, wherein the apparatus is configured to transfer state information to the texture state cache via the interface, wherein the interface circuitry has a width that is smaller than a width of the state information, and wherein the apparatus is configured to transfer state information for an entry in the texture state cache over multiple cycles.
13. A method, comprising:
retrieving state information from an entry in a texture state cache of a computing system, wherein the entry in the texture state cache is associated with texture data stored in a storage element of the computing system; and
determining pixel attributes based on the stored texture data and the state information.
14. The method of claim 13, further comprising:
retrieving texel information from the texture data based on texture state information included in the state information; and
determining the pixel attributes based on the texel information and based on sampler state information included in the state information.
15. The method of claim 13, further comprising:
receiving a texture command that includes an index of the entry; and
passing the index via a plurality of stages of a texture processing pipeline;
wherein the retrieving is performed for multiple ones of the plurality of stages.
16. The method of claim 13, wherein the state information includes at least one of: base address, width, height, mipmap information, swizzle information, stencil texturing information, filter type, anisotropic filtering information, level of detail information, comparison mode information, edge value information, and border color information.
17. The method of claim 13, further comprising selecting a victim entry in the texture state cache based on: least-recently-used information, validity information, and pending counter information for a plurality of entries of the texture state cache.
18. An apparatus, comprising:
a texture cache configured to store a plurality of textures for graphics processing;
a texture state cache comprising a plurality of entries each configured to store state information for one or more of the plurality of textures;
texture processing circuitry configured to:
retrieve state information from an entry of the texture state cache;
retrieve texture information from the texture cache based on the state information; and
determine pixel attributes based on the state information and the texture information.
19. The apparatus of claim 18, further comprising:
a shared memory; and
control circuitry configured to:
determine, by comparing a location of the state information in the shared memory to tag values of the plurality of entries, that the state information is not currently stored in the texture state cache;
store the state information in the entry; and
transmit a command to the texture processing circuitry that includes an index of the entry.
20. The apparatus of claim 18,
wherein the texture processing circuitry comprises a plurality of pipeline stages;
wherein the texture state cache includes a plurality of write ports; and
wherein the texture processing circuitry is configured to access the texture state cache for multiple ones of the plurality of pipeline stages in the same cycle.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A method for measuring a water concentration in ammonia, comprising using ammonia having a water concentration of 10 ppm or less as a reference gas, introducing the ammonia at a constant flow rate into a multi-reflection long optical path cell, and measuring infrared absorption intensity of water at a wave number at which infrared absorptions of ammonia and water do not overlap.
2. The method for measuring a water concentration in ammonia as claimed in claim 1, wherein the measurement wave number used is in the range of from 3,500 to 4,000 cm1, from 2,600 to 3,100 cm1, or from 1,900 to 2,400 cm1.
3. The method for measuring a water concentration in ammonia as claimed in claim 2, wherein said measurement wave number is one or more selected from the group consisting of 3600, 3609, 3612, 3619, 3629, 3634, 3649, 3656, 3670, 3675, 3688, 3691, 3701, 3709, 3712, 3719, 3722, 3727, 3732, 3736, 3741, 3744, 3749, 3752, 3756, 3759, 3766, 3770, 3779, 3785, 3796, 3801, 3807, 3816, 3821, 3826, 3831, 3835, 3837, 3840, 3843, 3854, 3862, 3865, 3870, 3874, 3880, 3885, 3891, 3894, 3899, 3902, and 3904 cm1 (variation width: 1 cm1).
4. The method for measuring a water concentration in ammonia as claimed in claim 3, wherein said measurement wave number is one or more selected from the group consisting of 3801, 3807, 3816, 3821, 3837 and 3854 cm1 (variation width 1 cm1).
5. The method for measuring a water concentration in ammonia as claimed in any one of claims 1 to 3, wherein said ammonia is obtained by vaporizing liquefied ammonia.
6. The method for measuring a water concentration in ammonia as claimed in claim 1, wherein said ammonia has a water concentration of 10 ppm or less.
7. The method for measuring a water concentration in ammonia as claimed in claim 6, wherein said ammonia has a water concentration of 1 ppm or less.
8. The method for measuring a water concentration in ammonia as claimed in claim 7, wherein said ammonia has a water concentration of 0.1 ppm or less.
9. The method for measuring a water concentration in ammonia as claimed in claim 1, wherein ammonia gas is introduced into said multi-reflection long optical path cell at a flow rate of from 0.1 to 5 Lmin.
10. The method for measuring a water concentration in ammonia as claimed in claim 1, wherein an infrared ray is multi-reflected to have an infrared optical path length of from 1 to 40 m.
11. An infrared measuring apparatus comprising an infrared spectroscope, a long optical path gas cell, a flow rate controlling unit and a vaporizer, wherein ammonia gas vaporized by the vaporizer is fed into the flow rate controlling unit, the ammonia gas is introduced from the flow rate controlling unit into the long optical path gas cell at a constant flow rate, and the water content of ammonia in the long optical path gas cell is measured by the infrared spectroscope.
12. The infrared measuring apparatus as claimed in claim 11, wherein said long optical path gas cell has a volume of from 0.1 to 5 L.
13. A method for producing ammonia having a decreased water content, wherein the method comprises the steps of distilling crude ammonia and measuring a water concentration in ammonia using a measurement method as claimed in any one of claims 1 to 10.
14. A method for producing ammonia having a decreased water content, wherein the method comprises the steps of purifying crude ammonia by contacting it with at least one purifying agent selected from the group consisting of metals, metal oxides and zeolite and measuring a water concentration in ammonia using a measurement method as claimed in any one of claims 1 to 10.
15. The method for producing ammonia as claimed in claim 13 or 14, wherein ammonia having a water content of 1 ppm or less is produced.
16. The method for producing ammonia as claimed in claim 15, wherein ammonia having a water content of 0.1 ppm or less is produced.
17. Ammonia having a water content decreased to 1 ppm or less produced by a method as claimed in claim 15.
18. Ammonia having a water content decreased to 0.1 ppm or less produced by a method as claimed in claim 16.
19. A semiconductor nitride film produced using ammonia having a decreased water content obtained by a method as claimed in any one of claims 13 to 16.
20. A group III-V compound semiconductor produced using ammonia having a decreased water content obtained by a method as claimed in any one of claims 13 to 16.
21. The group III-V compound semiconductor as claimed in claim 20, wherein said group III-V compound semiconductor is GaN, InxGa1xN, BxGa1xN, AlxGa1xN, InxAlyGa1xyN, GaNpAs1p, GaNpAsqP1pq, or InxGa1xNpAs1p (provided that x, y, p, and q are numbers that satisfy 0<x, y, p, q<1).