1460904873-b1533d8d-0948-4877-8748-d190a0f19759

1. A system, comprising:
a catalytic partial oxidation (CPO) system comprising a CPO-input line and a CPO-output line, wherein
the CPO-input line is in fluid communication with a CPO-natural gas input e, a CPO-air input line, and a CPO-steam input line;
a Fischer-Tropsch (F-T) system comprising an F-T-reactor input line, an F-T-reactor output line, an F-T water input line, and an F-T steam output line, wherein
the F-T-reactor input line is in fluid communication with the CPO-output line and an F-T-syngas compressor,
the F-T-reactor output line is in fluid communication with an F-T-liquid output line, and an F-T-gas output line, and
the F-T steam output line is in fluid communication with the CPO-steam input line; and
a power engine (PE) system comprising a power engine (PE), a PE-input line, and a PE-output line, wherein
the PE-input line is in fluid communication with the F-T-gas output line, and the PE is configured to provide energy to the F-T-syngas compressor.
2. The system of claim 1, wherein the CPO-air input line is further in communication with a. CPO-air compressor, and the CPO-air compressor is in communication with the PE.
3. The system of claim 1, further comprising a steam-heat exchanger in communication with the CPO-output line and the CPO-steam input line.
4. The system of claim 1, further comprising a natural gas-heat exchanger in with the CPO-output line and the CPO-natural gas input line.
5. The system of claim 1, further comprising an air-heat exchanger in communication with the CPO-output line and the CPO-air input line.
6. The system of claim 1, further comprising a syngas-condenser in fluid communication with the CPO-output line and the F-T-reactor input line.
7. The system of claim 1, further comprising a F-T gas-liquid separator in fluid communication with the F-T-reactor output line, the F-T-gas output line, and the F-T-liquid output line.
8. A method comprising:
a. providing natural gas, air, and steam to a catalytic partial oxidation (CPO) system as a CPO input;
b. carrying out a CPO reaction to produce a CPO output comprising syngas and nitrogen;
c. feeding at least a portion of the CPO output as a Fischer-Tropch (F-T) reactor input, to an F-T system;
d. feeding water as an input to the F-T system;
e. carrying out an F-T reaction in the F-T system to produce an F-T steam product, and an F-T reactor output comprising F-T liquids and F-T gases;
feeding the F-T gases as an input to a power engine (PE); and
g. supplying at least a portion of the F-T steam as a feed-input to the CPO system.
9. The method of claim 8, wherein a temperature of the CPO system during the initial CPO reaction is less than about 400\xb0 C.
10. The method of claim 8, wherein after an initial start-up period, the CPO reaction is carried out in the absence of any external heat input.
11. The method of claim 8, wherein the CPO input has an oxygen to carbon ratio in a range from about 0.5 to about 1.5.
12. The method of claim 8, wherein the CPO input has a steam to carbon ratio in the range from about 0.3 to about 1.5.
13. The method of claim 8, wherein the syngas comprises hydrogen and carbon monoxide, and the ratio of hydrogen to carbon monoxide is in the range of about 1 to about 3.
14. The method of claim 8, further comprising the step of compressing the F-T input, prior to feeding the F-T input to the F-T reactor.
15. The method of claim 8, wherein the RE supplies power for the compression of the F-T input.
16. The method of claim 8, wherein the F-T-reactor input comprises nitrogen in a range from about 20 volume % to about 50 volume %.
17. The method of claim 8, wherein the CPO reaction is carried out at a temperature in a range from about 700\xb0 C. to about 1000\xb0 C.
18. The method of claim 8, wherein the CPO input exchanges heat with the CPO output to produce a cooled CPO output stream.
19. A system, comprising:
a) a catalytic partial oxidation (CPO) system configured to convert natural gas, air, and steam, to syngas, in a CPO reaction;
b) a Fischer-Tropsch (F-T) system in communication with the CPO system, and configured to receive at least a portion of the syngas from the CPO system, and to produce a steam product, and F-T liquids and gases;
wherein the F-T system comprises a compressor for compressing the syngas; and also comprises a conduit configured to direct at least a portion of the steam product to the CPO system for carrying out the CPO reaction; and

c) a power engine, in communication with the F-T system and at least partially fueled by the F-T liquids or gases, and configured to supply energy to the syngas compressor.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A pixel structure, disposed on a substrate, the pixel structure comprising:
a scan line and a data line arranged on the substrate;
a first thin film transistor disposed on the substrate, wherein the first thin film transistor comprises a gate electrode electrically connected to the scan line, a source electrode electrically connected to the data line and a drain electrode;
a second thin film transistor disposed on the substrate, wherein the second film transistor comprises a gate electrode, a source electrode electrically connected to the data line and a drain electrode electrically connected to the drain electrode of the first thin film transistor;
a pixel electrode disposed on the substrate and electrically connected the drain electrodes of the first and the second thin film transistors via a first contact hole; and
a pattern designed at the layer of the source electrodes and the drain electrodes of the first and the second thin film transistors, wherein two ends of the pattern cross over the gate electrode of the first thin film transistor and the gate electrode of the second thin film transistor respectively.
2. A pixel structure according to claim 1, wherein the gate electrode of the second thin film transistor is floating.
3. A pixel structure according to claim 2, wherein the second thin film transistor further comprises a top gate electrode opposite to the gate electrode of the second thin film transistor at the layer of the pixel electrode, and the top gate electrode is electrically connected to the gate electrode of the second thin film transistor.
4. A pixel structure according to claim 3, wherein the top gate electrode is electrically connected to the gate electrode of the second thin film transistor via a second contact hole.
5. A pixel structure according to claim 3, wherein the top gate electrode is a transparent electrode.
6. A method of repairing a pixel structure, wherein the pixel structure comprises a first thin film transistor which comprises a gate electrode electrically connected to a scan line, a source electrode electrically connected to a data line and a drain electrode electrically connected to a pixel electrode, a second thin film transistor which comprises a float gate electrode, a source electrode electrically connected to the data line and a drain electrode electrically connected to the pixel electrode, and a pattern which comprises two ends crossing over the gate electrodes of the first and the second thin film transistors respectively, the method of repairing a pixel structure comprising:
cutting off the connection between the drain electrode of the first thin film transistor and the pixel electrode; and
electrically connecting the gate electrode of the first thin film transistor and the gate electrode of the second thin film transistor.
7. A method of repairing a pixel structure according to claim 6, wherein the cutting step utilizes a laser cutting method.
8. A method of repairing a pixel structure according to claim 6, wherein the connecting step utilizes a laser welding method.
9. A method of repairing a pixel structure according to claim 6, wherein the connecting step is to electrically connect the gate electrode of the first thin film transistor and the gate electrode of the second thin film transistor to the pattern.
10. A method of repairing a pixel structure according to claim 6, wherein the second thin film transistor further comprises a top gate electrode opposite to the gate electrode of the second thin film transistor at the layer of the pixel electrode layer, and the top gate electrode is electrically connected to the gate electrode of the second thin film transistor.
11. A pixel structure, disposed on a substrate, the pixel structure comprising:
a scan line and a data line arranged on the substrate;
a first thin film transistor disposed on the substrate, wherein the first thin film transistor comprises a gate electrode electrically connected to the scan line, a source electrode electrically connected to the data line and a drain electrode;
a second thin film transistor disposed on the substrate, wherein the second film transistor comprises a gate electrode electrically connected to the scan line, a source electrode electrically connected to the data line and a drain electrode;
a pixel electrode disposed on the substrate and electrically connected to the drain electrode of the first thin film transistor via a first contact hole; and
a pattern designed at the layer of the gate electrodes of the first and the second thin film transistors, wherein two ends of the pattern cross over the drain electrode of the first thin film transistor and the drain electrode of the second thin film transistor respectively.
12. A pixel structure according to claim 11, wherein the drain electrode of the second transistor is floating.
13. A pixel structure according to claim 12, wherein the second thin film transistor further comprises a top gate electrode opposite to the gate electrode of the second thin film transistor at the layer of the pixel electrode, and the top gate electrode is electrically connected to the gate electrode of the second thin film transistor.
14. A pixel structure according to claim 13, wherein the top gate electrode is electrically connected to the gate electrode of the second thin film transistor via a second contact hole.
15. A pixel structure according to claim 13, wherein the top gate electrode is a transparent electrode.
16. A method of repairing a pixel structure, wherein the pixel structure comprises a first thin film transistor which comprises a gate electrode electrically connected to a scan line, a source electrode electrically connected to a data line and a drain electrode electrically connected to a pixel electrode, a second thin film transistor which comprises a gate electrode electrically connected to the scan line, a source electrode to the data line and a float drain electrode, and a pattern which comprises two ends crossing over the drain electrodes of the first and the second thin film transistors, the method of repairing the pixel comprising:
cutting off the connection between the drain electrode of the first thin film transistor and the pixel electrode; and
electrically connecting the drain electrode of the first thin film transistor and the drain electrode of the second thin film transistor.
17. A method of repairing a pixel structure according to claim 16, wherein the cutting step utilizes a laser cutting method.
18. A method of repairing a pixel structure according to claim 16, wherein the connecting step utilizes a laser welding method.
19. A method of repairing a pixel structure according to claim 16, wherein the connecting step is to electrically connect the drain electrode of the first thin film transistor and the drain electrode of the second thin film transistor to the pattern.
20. A method of repairing a pixel structure according to claim 16, wherein the second thin film transistor further comprises a top gate electrode opposite to the gate electrode of the second thin film transistor at the layer of the pixel electrode, and the top gate electrode is electrically connected to the gate electrode of the second thin film transistor.