1. A power feed circuit operable to supply power to an Ethernet network powered device (PD) coupled to an Ethernet network, comprising:
two differential transistor pairs wherein each transistor of the differential transistor pairs is operable to pass an Ethernet power signal;
two pairs of impedance sense resistors, wherein each of the impedance sense resistors is coupled to a single transistor of the differential transistor pairs, wherein each of the impedance sense resistors is operable to pass Ethernet power signals received from a drain of the coupled transistor;
an amplifier coupled to the drains of each of the transistors within a coupled differential transistor pair, wherein the amplifier are operable to:
amplify a differential voltage across the pair of impedance sense resistors coupled to the differential transistor pair; and
apply a feedback signal to a gate of each of the transistors within the differential transistor pair coupled to the amplifier, wherein the feedback signal is based on the differential voltage, wherein the feedback signal forces the Ethernet power signal passed by each of the transistors in the differential transistor pair to be equal; and
a pair of output nodes, wherein one output node is associated with each of the differential transistor pairs, and wherein the pair of output nodes feed power to the Ethernet network PD.
2. The power feed circuit of claim 1, wherein the power feed circuit is implemented as an integrated circuit (IC).
3. The power feed circuit of claim 1, wherein the power feed circuit interfaces to a switchingrectifying circuit, wherein the switchingrectifying circuit is operable to rectify the Ethernet power signal.
4. The power feed circuit of claim 3, wherein the switchingrectifying circuit interfaces with a plurality of twisted pairs, wherein the plurality of twisted pairs passes the Ethernet power signal.
5. The power feed circuit of claim 1, further comprising splitting circuitry operable to separate a data signal from the Ethernet power signal, and wherein the data signal is passed to an Ethernet PHY module.
6. The power feed circuit of claim 5, wherein the splitting circuitry comprises direct current (DC) blocking capacitors.
7. The power feed circuit of claim 1, wherein:
an RJ45 connector physically couples the Ethernet network PD to the Ethernet network, and wherein the RJ45 connector couples to twisted pairs that further comprise conductors 1 and 2; 3 and 6; 4 and 5; and 7 and 8; and
the switchingrectifying circuit receives the Ethernet power signal utilizing conductors 1, 2, 3, and 6 or conductors 4, 5, 7, and 8.
8. The power feed circuit of claim 2, wherein the integrated circuit (IC) further comprises:
an Ethernet physical layer (PHY) module;
an Ethernet media access controller (MAC) wherein the Ethernet PHY module and Ethernet MAC are operable to implement hardware layers of an Ethernet network protocol stack;
a power management module; and
Ethernet network PD application specific processors and memory.
9. The power feed circuit of claim 2, wherein the integrated circuit (IC) further comprises a diode bridge network operable to rectify an Ethernet power signal.
10. The power feed circuit of claim 2, wherein the Ethernet power signal is operable to at least partially power the Ethernet network PD.
11. The power feed circuit of claim 1, operable to provide:
a high impedance in a differential sense across the pair of output nodes; and
low impedance in a common mode sense across the pair of output nodes.
12. A method to at least partially power an Ethernet network powered device PD, from an Ethernet power signal fed through an Ethernet network connection, comprising:
physically coupling the Ethernet network PD to the Ethernet network;
receiving an Ethernet signal from the Ethernet network, wherein the Ethernet signal comprises the plurality of power signals andor data signal(s);
passing the Ethernet signal an integrated circuit (IC), wherein the IC comprises a power feed circuit;
separating with the IC, the data signal from the Ethernet signal, wherein the data signal is passed to an Ethernet physical layer (PHY) module;
separating with the IC, the Ethernet power signal from the Ethernet signal, wherein the power signal is passed to the power management module; and
at least partially powering the Ethernet network PD from the power signal.
13. The method of claim 12, wherein the power feed circuit further comprises:
two differential transistor pairs wherein each of the transistors within the differential transistor pairs is operable to pass an Ethernet power signal;
two pairs of impedance sense resistors coupled to a single transistor within the differential transistor pair, wherein each of the impedance sense resistors is operable to pass the Ethernet power signals received from a drain of the coupled transistor;
an amplifier coupled to the drains of each of the transistors within the differential transistor pair, wherein the amplifier(s) are operable to:
amplify a differential voltage across the pair of impedance sense resistors coupled to the differential transistor pair; and
apply a feedback signal to a gate of each of the transistors within the differential transistor pair coupled to the amplifier, wherein the feedback signal is based on the differential voltage, wherein the feedback signal forces the Ethernet power signal passed by each of the transistors in a differential transistor pair to be equal; and
a pair of output nodes, wherein one output node is associated with each of the differential transistor pairs, and wherein the pair of output nodes feed power to the Ethernet network PD.
14. The method of claim 12, further comprising rectifying the Ethernet power signal(s) with a switchingrectifying circuit.
15. The method of claim 12, further comprising interfacing the diode bridge network with a plurality of twisted pairs, wherein the plurality of twisted pairs pass the Ethernet signal.
16. The method of claim 15, wherein:
an RJ45 connector physically couples the Ethernet network PD to the Ethernet network, and wherein the RJ45 connector couples to twisted pairs that further comprise conductors 1 and 2; 3 and 6; 4 and 5; and 7 and 8; and
the diode bridge network receives the Ethernet power signal utilizing conductors 1, 2, 3, and 6 or conductors 4, 5, 7, and 8.
17. The method of claim 12, wherein the integrated circuit (IC) further comprises:
an Ethernet physical layer (PHY) module;
an Ethernet media access controller (MAC) wherein the Ethernet PHY module and Ethernet MAC are operable to implement hardware layers of an Ethernet protocol stack;
a power management module; and
Ethernet network PD application specific processors and memory.
18. A method to at least partially power an Ethernet network powered device PD, from an Ethernet power signal fed through an Ethernet network connection, comprising:
receiving a plurality of paired Ethernet power signals;
passing each pair of Ethernet power signal through a differential transistor pairs;
sensing a drain voltage at a drain of each of the transistors within the differential transistor pair;
comparing the drain voltages of each of the transistors within the differential transistor pair;
producing control signals for of each of the transistors within the differential transistor pair based on the comparison of the drain voltages of each of the transistors within the differential transistor pair;
applying the control signal to a gate of each of the transistors, wherein the control signal forces the Ethernet power signal passed by each of the transistors in a differential transistor pair to be equal; and
passing the Ethernet power signal from a pair of output nodes wherein one output node is associated with each of the differential transistor pairs, and wherein the pair of output nodes feed power to the Ethernet network PD.
19. The method of claim 18, further comprising:
physically coupling the Ethernet network PD to the Ethernet network;
receiving an Ethernet signal from the Ethernet network, wherein the Ethernet signal comprises the plurality of Ethernet power signals andor data signal(s); and
rectifying the Ethernet power signals.
20. The method of claim 18, wherein:
an RJ45 connector physically couples the Ethernet network PD to the Ethernet network, and wherein the RJ45 connector couples to twisted pairs that further comprise conductors 1 and 2; 3 and 6; 4 and 5; and 7 and 8; and
a switchingrectifying circuit rectifies the Ethernet power signal received utilizing conductors 1, 2, 3, and 6 or conductors 4, 5, 7, and 8.
21. A power feed circuit operable to supply power to an Ethernet network powered device (PD) coupled to an Ethernet network, comprising an integrated circuit (IC) that further comprises:
two differential transistor pairs wherein each of the transistors of the differential transistor pairs is operable to pass an Ethernet power signal;
two pairs of impedance sense resistors, wherein each of the impedance sense resistors is coupled to a single transistor of the differential transistor pairs, wherein each of the impedance sense resistors is operable to pass Ethernet power signals received from a drain of the coupled transistor;
an amplifier coupled to the drains of each of the transistors within a differential transistor pair, wherein the amplifier are operable to:
amplify a differential voltage across the pair of impedance sense resistors coupled to the differential transistor pair; and
apply a feedback signal to a gate of each of the transistors within the differential transistor pair coupled to the amplifier, wherein the feedback signal is based on the differential voltage, wherein the feedback signal forces the Ethernet power signal passed by each of the transistors in the differential transistor pair to be equal; and
a pair of output nodes, wherein one output node is associated with each of the differential transistor pairs, and wherein the pair of output nodes feed power to the Ethernet network PD.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A frame for a bicycle, the frame adapted to support a rear wheel that defines a central plane, the frame comprising:
a first seat stay tube defining a side surface and having a first portion disposed on a first side of the rear wheel and a second portion having a centerline disposed substantially on the central plane; and
a second seat stay tube having a third portion disposed on a second side of the rear wheel opposite the first side and a first end attached to the side surface of the first seat stay tube.
2. The frame of claim 1, wherein the first seat stay tube and the second seat stay tube cooperate to define a seam, and wherein the seam extends to the central plane.
3. The frame of claim 1, wherein the first seat stay tube is a single continuous member.
4. The frame of claim 3, wherein the second seat stay tube is a single continuous member.
5. The frame of claim 1, further comprising:
a seat tube having a centerline disposed substantially on the central plane; and
a rear dropout adapted to support a rear wheel, wherein the first seat stay tube includes a first end connected to the seat tube and a second end connected to the rear dropout.
6. The frame of claim 1, wherein the second seat stay tube is substantially the same as a part of the first seat stay tube.
7. The frame of claim 6, wherein the part of the first seat stay tube accounts for at least 75 percent of the length of the first seat stay tube.
8. A frame for a bicycle having a rear wheel, the frame comprising:
a seat tube;
a first dropout adapted to support the rear wheel;
a second dropout adapted to support the rear wheel;
a first seat stay tube including a first portion, a second portion, a first end connected to the first dropout, a second end connected to the seat tube, and a continuous wall extending between the first end and the second end; and
a second seat stay tube including a first portion, a first end connected to the second dropout, a second end connected to the wall of the first seat stay tube and not to the seat tube, and a continuous wall extending between the first end and the second end.
9. The frame of claim 8, wherein the rear wheel defines a central plane, and the second seat stay tube and the first seat stay tube cooperate to define a seam that extends to the central plane.
10. The frame of claim 8, wherein the first seat stay tube is formed from a single continuous member.
11. The frame of claim 10, wherein the second seat stay tube is formed from a single continuous member.
12. The frame of claim 8, wherein the second seat stay tube is substantially the same as a part of the first seat stay tube.
13. The frame of claim 9, wherein the part of the first seat stay tube accounts for at least 75 percent of the length of the first seat stay tube.
14. A method of forming a frame for a bicycle, the method comprising:
positioning a seat tube;
forming a first seat stay tube having a first end;
forming a second seat stay tube that is substantially the same as the first seat stay tube;
attaching the first end of the first seat stay tube to the seat tube;
removing a portion of the second seat stay tube to define a second end, and resulting in a modified second seat stay tube that is shorter than the first seat stay tube; and
attaching the second end of the modified second seat stay tube to the first seat stay tube.
15. The method of claim 14, wherein the first seat stay tube is formed from a single continuous member.
16. The method of claim 15, wherein the second seat stay tube is formed from a single continuous member.