1-33. (canceled)
34. A SiGe bipolar transistor comprising:
a silicon collector layer containing N-type dopants;
an silicon emitter layer containing N-type dopants; and
a silicon germanium base layer, containing P-type dopants and placed between the collector layer and the emitter layer,
wherein a germanium concentration of the base layer increases up to 6 to 16% as a distance from the collector layer decreases,
wherein a thickness of the base layer is 60 to 90 nm, and
wherein a dopant concentration of the collector layer is 5\xd71014 to 1\xd71016 cm\u22123,
whereby the SiGe bipolar transistor is operable to repeatedly turn on and off at high frequency to generate a DC power.
35. The SiGe bipolar transistor according to claim 34, wherein a thickness of the collector layer is 1.5 to 2.5 \u03bcm.
36. A SiGe bipolar transistor comprising:
a silicon collector layer containing N-type dopants;
an silicon emitter layer containing N-type dopants; and
a base layer containing P-type dopants and placed between the collector layer and the emitter layer,
wherein the base layer includes a silicon germanium layer having a germanium concentration of 6 to 16%,
wherein the base layer has a thickness of 60 to 90 nm, and
wherein a dopant concentration of the collector layer is 5\xd71014 to 1\xd71016 cm\u22123,
whereby the SiGe bipolar transistor is operable to repeatedly turn on and off at high frequency to generate a DC power.
37. The SiGe bipolar transistor according to claim 36, wherein a thickness of the collector layer is 1.5 to 2.5 \u03bcm.
38. The SiGe bipolar transistor according to claim 36, wherein the base layer further includes an additional silicon germanium layer having a germanium concentration less than that of the silicon germanium layer,
wherein the silicon germanium layer is connected with the collector layer, and the additional silicon germanium layer is connected with the emitter layer.
39. The SiGe bipolar transistor according to claim 36, wherein the base layer further includes a silicon layer,
wherein the silicon germanium layer is connected with the collector layer, and the silicon layer is connected with the emitter layer.
40. A method of manufacturing a silicon germanium bipolar transistor comprising:
forming an N-type silicon collector layer, having a dopant concentration of 5\xd71014 to 1\xd71016 cm\u22123 on an N-type silicon substrate;
forming a P-type silicon germanium base layer of having a thickness of 60 to 90 nm on the N-type collector layer, wherein a germanium concentration of the P-type silicon germanium base layer increases up to 6 to 16% as a distance from the collector layer decreases; and
forming an N-type silicon emitter layer.
41. A DCDC converter comprising:
an input terminal receiving DC power input;
an output terminal;
a grounded terminal;
a smoothing capacitor connected between the output and grounded terminals; and
a bipolar transistor for switching the DC power input received from the input terminal to generate DC power output on the output terminal,
wherein a base layer of the bipolar transistor includes a silicon germanium layer.
42. The DCDC converter according to claim 41, wherein a germanium concentration of the silicon germanium layer increases up to 6 to 16% as a distance from a collector layer of the bipolar transistor decreases, wherein a thickness of the base layer is 60 to 90 nm, and wherein a dopant concentration of the collector layer is 5\xd71014 to 1\xd71016 cm\u22123.
43. The DCDC converter according to claim 41, wherein the silicon germanium layer has a germanium concentration of 6 to 16%,
wherein the base layer has a thickness of 60 to 90 nm, and
wherein a dopant concentration of the collector layer is 5\xd71014 to 1\xd71016 cm\u22123.
44. The DCDC converter according to claim 41, wherein a thickness of the collector layer is 1.5 to 2.5 \u03bcm.
45. The DCDC converter according to claim 43, wherein the base layer further includes an additional germanium layer having a germanium concentration less than that of the silicon germanium layer,
wherein the silicon germanium layer is connected with the collector layer, and the additional silicon germanium layer is connected with an emitter layer of the bipolar transistor.
46. The DCDC converter according to claim 43, wherein the base layer further includes a silicon layer,
wherein the first silicon germanium layer is connected with the collector layer, and the silicon layer is connected with the emitter layer.
47. A DCDC conversion method comprising:
receiving DC power input at an input terminal;
switching the DC power input received at the input terminal with a bipolar transistor to generate DC power output, wherein a base layer of the bipolar transistor includes a silicon germanium layer; and
outputting the DC power output.
48. The DCDC conversion method according to claim 47, wherein the DC power input is switched at a switching frequency of several tens of MHz.
49. The DCDC conversion method according to claim 47, wherein a germanium concentration of the silicon germanium layer increases up to 6 to 16% as a distance from a collector layer of the bipolar transistor decreases,
wherein a thickness of the base layer is 60 to 90 nm, and
wherein a dopant concentration of the collector layer is 5\xd71014 to 1\xd71016 cm\u22123.
50. The DCDC conversion method according to claim 47, wherein the silicon germanium layer has a germanium concentration of 6 to 16%,
wherein the base layer has a thickness of 60 to 90 nm, and
wherein a dopant concentration of the collector layer is 5\xd71014 to 1\xd71016 cm\u22123.
51. The DCDC conversion method according to claim 50, wherein the base layer further includes an additional germanium layer having a germanium concentration less than that of the silicon germanium layer,
wherein the silicon germanium layer is connected with the collector layer, and the additional silicon germanium layer is connected with an emitter layer of the bipolar transistor.
52. The DCDC conversion method according to claim 50, wherein the base layer further includes a silicon layer,
wherein the first silicon germanium layer is connected with the collector layer, and the silicon layer is connected with the emitter layer.
53. A method of manufacturing a DCDC converter comprising:
preparing a silicon germanium bipolar transistor; and
assembling the silicon germanium bipolar transistor, an inductor, a smoothing capacitor, a diode, an input terminal, an output terminal, and a grounded terminal into a DCDC converter,
wherein a collector of the silicon germanium bipolar transistor is connected to the input terminal,
wherein the inductor is connected between the input terminal and an emitter of the bipolar transistor,
wherein the smoothing capacitor is connected between the output and grounded terminals, and
wherein the diode is connected between the emitter of the silicon germanium bipolar transistor and the grounded terminal.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A Potassium Fluotitanate (K2TIF6) manufacture process comprises following steps:
A. providing titanium ferrum powder to a reaction furnace and adding HF and peroxide solution to react with the titanium ferrum powder sufficiently to manufacture H2TiF6:
B. filtrating the sufficiently mixed solution of step A and adding it to another reaction furnace, and then after the H2TiF6 cools off, adding Potassium Chloride (KCl) solution to react with the mixed solution to manufacture Potassium Fluotitanate (K2TiF6):
H2TiF6+KCl\u2192K2TIF6\u2193+HCl,
the Potassium Fluotitanate (K2TiF6) is recycled by centrifuge dripping filtrating; and
C. adding K2CO3 solution to the remaining solution of step B and react with the remaining solution and controlling the pH value,
H3FeF6+K2CO3+HCl+H2O\u2192Fe(OH)3\u2193+KCl+KF+H2O,
the element Fe is recycled by a form of Fe(OH)3 flocculent precipitate and the Potassium Chloride (KCl) and KF solution are recycled.
2. The Potassium Fluotitanate (K2TiF6) manufacture process according to claim 1, wherein the peroxide is inorganic peroxide or organic peroxide.
3. The Potassium Fluotitanate (K2TiF6) manufacture process according to claim 1, wherein the inorganic peroxide is H2O2 or K2O2, and the organic peroxide is CH3CO2OH.
4. The Potassium Fluotitanate (K2TiF6) manufacture process according to any claim of claim 1 to claim 3, wherein during the step C, the pH value is in a range of 2\u02dc3, 3\u02dc4, 4\u02dc5, or 5\u02dc7.
5. A Potassium Fluotitanate (K2TIF6) manufacturing reaction furnace comprising a reaction furnace main body, a sealing cover sealed the reaction furnace main body, an output, and a stirring unit disposed in the reaction furnace main body, wherein the sealing cover comprises several hole accesses to add hydrofluoric acid (HF), titanium ferrum powder accesses, and HF steam recycling condensation device.
6. The Potassium Fluotitanate (K2TIF6) manufacturing reaction furnace according to claim 5, wherein the HF steam recycling condensation device including several bent condenser tubes, an HF recycling groove is disposed at the end of the bent part, the condenser tube further comprises a condensation water device connecting to the adjacent condenser tube.
7. The Potassium Fluotitanate (K2TIF6) manufacturing reaction furnace according to claim 6, wherein the hydrofluoric acid (HF) steam recycling condensation device comprises bent condenser tube and an air blower is disposed at the bent part of the condenser tube separately.
8. The Potassium Fluotitanate (K2TIF6) manufacturing reaction furnace according to claim 7, wherein a graphite layer is disposed at the inside of the reaction furnace main body and the material of the stirring unit is PolyVinyl Chloride (PVC) or Polypropylene (PP).