1. A fastened structure comprising:
a first member provided with a female screw;
a second member provided with an opening; and
a male screw fastening said first member and said second member with each other and including a male screw portion, and a head portion having a bearing surface, wherein the male screw portion is threaded in the female screw through the opening of said second member,
wherein the second member is provided with a substantially circular folded portion including a curved surface defining the opening and including a free end having an edge pressed against the bearing surface of said male screw.
2. A fastened structure according to claim 1, wherein the curved surface is formed by folding said second member, in a direction toward the bearing surface of the head portion, in a region in the neighborhood of a rotational axis position of said male screw.
3. A fastened structure according to claim 2, wherein said second member in the region in the neighborhood of the rotational axis position of said male screw is folded in the direction toward the bearing surface at an angle of 90 degrees or less or is folded back in the direction toward the bearing surface at an angle an angle of 90 degrees or more and 180 degrees or less.
4. A fastened structure according to claim 2, wherein the bearing surface of the head portion is a flat surface perpendicular to a rotational axis of said male screw or has a recessed shape inclined from the rotational axis toward an outside with respect to a radial direction.
5. A fastened structure according to claim 1, wherein a distance from a center of a rotational axis of said male screw to the end of said second member contacting the bearing surface of the head portion is larger than a distance from the center of the rotational axis of said male screw to an outer peripheral portion of the male screw portion and is smaller than a diameter of an outer peripheral portion of the head portion.
6. A fastened structure according to claim 1, wherein said second member is formed with a thin metal plate.
7. A fastened structure comprising:
a first member provided with a female screw;
a second member provided with an opening; and
a male screw fastening said first member and said second member with each other and including a male screw portion, and a head portion having a bearing surface, wherein the male screw portion is threaded in the female screw through the opening of said second member,
wherein the second member is provided with a substantially circular folded portion including a curved surface defining the opening and including a free end having an edge biting into the bearing surface of said male screw.
8. A fastened structure according to claim 7, wherein the curved surface is formed by folding said second member, in a direction toward the bearing surface of the head portion, in a region in the neighborhood of a rotational axis position of said male screw.
9. A fastened structure according to claim 8, wherein said second member in the region in the neighborhood of the rotational axis position of said male screw is folded in the direction toward the bearing surface at an angle of 90 degrees or less or is folded back in the direction toward the bearing surface at an angle an angle of 90 degrees or more and 180 degrees or less.
10. A fastened structure according to claim 8, wherein the bearing surface of the head portion is a flat surface perpendicular to a rotational axis of said male screw or has a recessed shape inclined from the rotational axis toward an outside with respect to a radial direction.
11. A fastened structure according to claim 7, wherein a distance from a center of a rotational axis of said male screw to the end of said second member contacting the bearing surface of the head portion is larger than a distance from the center of the rotational axis of said male screw to an outer peripheral portion of the male screw portion and is smaller than a diameter of an outer peripheral portion of the head portion.
12. A fastened structure according to claim 7, wherein said second member is formed with a thin metal plate.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A data processing system comprising:
a master-state data processing unit;
a communication bus, the master-state data processing unit exchanging asynchronous transfer mode protocol signals with the bus; and
at least one slave-state data processing unit, the slave-state data processing unit including:
a central processing unit;
a direct memory access unit coupled to the central processing unit, and
a Utopia mode interface unit coupled to the central processing unit; the Utopia transfer mode interface unit having:
a processor coupled to the communication bus and exchanging asynchronous transfer mode protocol signals therewith; and
a buffer memory unit, the buffer memory unit buffering data signals between the direct memory access unit and the processor, wherein the transfer of data cells between the buffer memory unit and the direct memory interface unit is determined by an event signal.
2. The data processing system as recited in claim 1 wherein the Utopia interface unit can act in a receive mode and in a transmit mode.
3. The data processing system as recited in claim 1 wherein the buffer memory unit is a first-infirst-out memory unit.
4. The data processing system as recited in claim 1 wherein the processor includes:
an input interface unit; and
an output interface unit; and wherein the buffer memory unit includes:
an input buffer memory unit, wherein the transfer between the input buffer memory unit and the direct memory access unit is determined by a receive event signal; and
an output buffer memory unit, wherein the transfer between the direct memory access unit and the output buffer memory unit is determined by a transmit event signal.
5. The data processing system as recited in claim 4 wherein data is transferred from the communication bus to the input buffer memory unit, and wherein data is transferred from the output buffer memory unit to the communication unit through the output interface unit.
6. The data processing system as recited in claim 5 wherein in the input buffer memory unit and the output buffer memory units are first-infirst-out memory units.
7. The data processing system as recited in claim 4 wherein the receive event signal is generated when the buffer memory unit has a complete data cell stored therein, the receive event signal being cleared when transfer between the buffer memory unit and the direct memory access unit is begun, and wherein the transmit event signal is generated when the buffer memory unit has space for a complete data cell, the transmit event signal being cleared when the transfer of the data cell to the buffer memory unit from the direct memory access unit is begun.
8. A data processing system comprising:
at least one slave-state data processing unit;
a communication bus, the master-state data processing unit exchanging asynchronous transfer mode protocol signals with the bus; and
a master-state data processing unit, the master-state data processing unit including:
a central processing unit;
a direct memory access unit coupled to the central processing unit, and
a Utopia interface unit coupled to the central processing unit; the Utopia interface unit having:
a processor coupled to the communication bus and exchanging asynchronous transfer mode protocol signals therewith; and
a buffer memory unit, the buffer memory unit buffering data signals between the direct memory access unit and the processor.
9. The data processing system as recited in claim 8 wherein the processor includes:
an input interface unit; and
an output interface unit: and wherein the buffer memory unit includes;
an input buffer memory unit; and
an output buffer memory unit.
10. The data processing system as recited in claim 9 wherein the data is transferred from the communication bus through the input interface unit to the input buffer memory unit, and wherein data is transferred from the output buffer memory unit through the output interface unit to the communication bus.
11. The data processing system as recited in claim 10 wherein the input buffer memory unit and the output buffer memory unit are first-infirst-out memory units.
12. An Utopia interface unit for providing a interface between an external data processing unit and a direct memory access unit, the interface unit comprising:
an input buffer memory unit, the input buffer memory unit providing data cells to the direct memory interface unit;
an interface input unit, the interface input unit controlling the transmission of data cells from the external processing system to the input buffer memory unit;
an output buffer memory unit, the output buffer memory unit receiving data cells from the direct memory access unit; and
an interface output unit, the interface output unit controlling transmission of data cells from the output buffer memory unit to the external processing system.
13. The interface unit as recited in claim 12 wherein the input buffer memory unit and the output buffer memory unit are first-infirst-out memory units.
14. The interface unit as recited in claim 12 wherein the first-infirst-out memory units can store at least two data cells.
15. The interface unit as recited in claim 12 wherein data from the input buffer memory unit is transferred to the direct memory access unit in response to word-read signal from the buffer memory unit.
16. The interface unit as recited in claim 12 wherein data from the direct memory unit is stored in the output buffer memory unit in response to a word-write signal from the output buffer memory unit.
17. The interface unit as recited in claim 12 wherein data is transferred from the external processing unit to the input buffer unit in response to the cell-available signal from the input buffer unit.
18. The interface unit as recited in claim 12 wherein data is transferred from the out put buffer memory unit to the external processing unit in response to cell-available signal from the output buffer memory unit.
19. The interface unit as recited in claim 12 wherein the interface unit is operating in a slave mode, the transfer of of data cells from the input buffer memory unit and the direct memory access unit being determined by a receive event signal, the transfer of data cells from the direct memory access unit to the output buffer memory unit being determined by a transmit event signal.
20. The data processing system as recited in claim 19 wherein the receive event signal is generated when the input buffer memory unit has a complete data cell stored therein, the receive event signal being cleared when transfer between the input buffer memory unit and the direct memory access unit is begun, and wherein the transmit event signal is generated when the output buffer memory unit has space for a complete data cell, the transmit event signal being cleared when the transfer of the data cell to the output buffer memory unit from the direct memory access unit is begun.