1. An aircraft power system comprising:
an aircraft engine comprising a plurality of engine spools;
a plurality of AC bus generators driven by at least one engine spool, wherein each AC bus generator is independently operational to supply AC power to a respective AC power bus; and
at least one generator driven by a different engine spool, wherein the at least one generator is operational to supply AC power to each AC power bus in synchronization with each respective AC bus generator.
2. The aircraft power system according to claim 1, wherein at least one generator comprises a directly driven generator.
3. The aircraft power system according to claim 1, wherein the at least one generator is disposed within the aircraft engine.
4. The aircraft power system according to claim 1, wherein the plurality of AC bus generators and the at least one generator are disposed within the aircraft engine.
5. The aircraft power system according to claim 1, wherein the at least one generator is disposed external to the aircraft engine.
6. The aircraft power system according to claim 1, wherein the plurality of AC bus generators and the at least one generator are disposed external to the aircraft engine.
7. The aircraft power system according to claim 1, further comprising an electrical power extraction (EPX) controller operational to adjust power output associated with the at least one generator and the plurality of AC bus generators in accordance with a high level decision to optimize desired aircraft parameters.
8. The aircraft power system according to claim 7, wherein the desired aircraft parameters are selected from fuel burn, and engine operating stability margins.
9. The aircraft power system according to claim 7, further comprising a power electronics system associated with each AC power bus, wherein each power electronics system is operational to adjust load sharing between the plurality of AC bus generators and the at least one generator.
10. The aircraft power system according to claim 9, wherein each power electronics system is operational to adjust load sharing via modification of a desired operating parameter of the at least one generator relative to at least one AC bus generator.
11. The aircraft power system according to claim 10, wherein the desired operating parameter is selected from a power angle and a voltage droop.
12. The aircraft power system according to claim 1, further comprising:
an aircraft engine controller; and
an electrical power extraction (EPX) controller in communication with the aircraft engine controller, the aircraft engine controller and EPX controller together operational to control operation of the at least one generator to pick-up or shed loads supplied by the plurality of AC bus generators.
13. The aircraft power system according to claim 12, further comprising a power electronics system associated with each AC power bus, wherein each power electronics system is operational to adjust load sharing between the plurality of AC bus generators and the at least one generator.
14. The aircraft power system according to claim 13, wherein each power electronics system is operational to adjust load sharing via modification of a power angle of the at least one generator relative to at least one AC bus generator.
15. The aircraft power system according to claim 12, wherein the engine controller is a full authority digital engine controller (FADEC).
16. The aircraft power system according to claim 1, further comprising:
an aircraft engine controller; and
an electrical power extraction (EPX) controller in communication with the aircraft engine controller, the aircraft engine controller and EPX controller together operational to selectively control loading of the plurality of spools.
17. The aircraft power system according to claim 16, wherein the engine controller is a full authority digital engine controller (FADEC).
18. The aircraft power system according to claim 1, wherein each AC power bus is a wild-frequency or a constant-frequency AC power bus.
19. An aircraft power system comprising:
an aircraft engine;
a plurality of AC generators driven by the aircraft engine, wherein each AC generator is independently operational to supply AC power to a desired power electronics module in response to commands from an electrical power extraction (EPX) controller; and
at least one generator driven by the aircraft engine, wherein the at least one generator is operational to selectively supply additional AC power to each desired power electronics module in parallel with each respective AC generator in response to commands from the EPX controller.
20. The aircraft power system according to claim 19, wherein each power electronics module is configured to provide DC power to a respective power distribution bus.
21. The aircraft power system according to claim 19, wherein at least one generator is a directly driven generator.
22. An aircraft power system comprising:
an aircraft engine comprising a plurality of engine spools;
a plurality of AC bus generators driven by at least one engine spool, wherein each AC bus generator is independently operational to supply AC power to a respective power electronics module; and
at least one generator driven by a different engine spool, wherein the at least one generator is operational to supply additional AC power to each power electronics module in parallel with each respective AC generator.
23. The aircraft power system according to claim 22, wherein each power electronics module is configured to provide DC power to a respective power distribution bus.
24. The aircraft power system according to claim 22, wherein at least one generator is a directly driven generator.
25. The aircraft power system according to claim 22, wherein the at least one generator is disposed within the aircraft engine.
26. The aircraft power system according to claim 22, wherein the plurality of AC bus generators and the at least one generator are disposed within the aircraft engine.
27. The aircraft power system according to claim 22, wherein the at least one generator is disposed external to the aircraft engine.
28. The aircraft power system according to claim 22, wherein the plurality of AC bus generators and the at least one generator are disposed external to the aircraft engine.
29. The aircraft power system according to claim 22, further comprising an electrical power extraction (EPX) controller operational to adjust power output associated with the at least one generator and the plurality of AC bus generators in accordance with a high level decision to optimize desired aircraft parameters.
30. The aircraft power system according to claim 29, wherein the desired aircraft parameters are selected from fuel burn, and engine operating stability margins.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A flip chip package, comprising
a circuit substrate, having a carrier surface and a plurality of fiducial marks, said carrier surface having a chip connection region, and the fiducial marks being mounted onto the carrier surface outside the chip connection region;
a chip, connected to the chip connection region by flip chip interconnect method and the positioning of the chip in alignment with the chip connection region according to the fiducial marks; and
a plurality of barrier layers, covering and fixing onto the fiducial marks respectively, wherein the barrier layers are formed after the chip is fixed onto the chip connection region according to the fiducial marks.
2. The flip chip package of claim 1, wherein a material of the barrier layer includes solder.
3. The flip chip package of claim 1, wherein a material of the barrier layer includes organic material.
4. The flip chip package of claim 1, further comprising an underfill disposed between the chip and the circuit substrate, and a material of the barrier layer is similar to the underfill.
5. The flip chip package of claim 1, further comprising a solder mask, wherein the solder mask is disposed onto the carrier surface of the circuit substrate, and wherein the fiducial marks remain exposed and the barrier layers protrude out from the surface of the solder mask.
6. A flip chip package process, comprising:
connecting a chip to a circuit substrate by using flip chip interconnect method, wherein the circuit substrate includes a carrier surface and a plurality of fiducial marks, the carrier surface includes a chip connection region, the fiducial marks are disposed onto the carrier surface and are located outside the chip connection region;
positioning the chip on the chip connection region according to the fiducial marks;
mounting a solder block on each of the fiducial marks; and
carrying out a reflow treatment for fixing the chip with the circuit substrate and transforming the solder blocks become into barrier layers covering the fiducial marks respectively.
7. The process of claim 6, wherein the flip chip interconnect method includes a plurality of bumps to connect the chip to the circuit substrate.
8. The process of claim 7, wherein the solder block and the bumps are subjected to the reflow treatment simultaneously so that the bumps are fixed between the chip and the circuit substrate.
9. The process of claim 6, further comprising a step of forming an underfill between the chip and the circuit substrate after the step of forming the barrier layers.
10. The process of claim 6, wherein before connecting the chip to the circuit substrate in the flip chip interconnect method, an organic surface protection layer (OSP) is formed on each of the fiducial marks.
11. The process of claim 6, wherein a solder mask is disposed onto the carrier surface of the circuit substrate, and wherein the fiducial marks remain exposed and the barrier layers protrude out from the surface of the solder mask.
12. A flip chip package process, comprising:
connecting a chip to a circuit substrate by using flip chip interconnect method, wherein the circuit substrate includes a carrier surface and a plurality of fiducial marks, the carrier surface includes a chip connection region, the fiducial marks are disposed onto the carrier surface outside the chip connection region;
positioning and connecting the chip on the chip connection region according to the fiducial marks;
filling an underfill between the chip and the circuit substrate and disposing an organic material block on each of the fiducial marks; and
carrying out a curing treatment to fix the underfill and transform the organic material block into a barrier layer covering each of the fiducial marks respectively.
13. The process of claim 12, wherein a material of the barrier layer is similar to that of the underfill.
14. The process of claim 12, further comprising a step of forming an organic protection layer on each of the fiducial marks before the chip is connected to the circuit substrate using the flip chip interconnect method.
15. The process of claim 12, wherein a solder mask is disposed onto the carrier surface of the circuit substrate, and wherein the fiducial marks remain exposed and the barrier layers are protruded out from the surface of the solder mask.
16. A flip chip package process, comprising:
connecting a chip to a circuit substrate by using flip chip interconnect method, wherein the circuit substrate includes a carrier surface and a plurality of fiducial marks, the carrier surface includes a chip connection region, the fiducial marks are disposed onto the carrier surface outside the chip connection region;
positioning the chip on the chip connection region according to the fiducial marks;
disposing a barrier material block on each of the fiducial marks; and
carrying out a fixing treatment to transform the barrier material block into a barrier layer for covering the fiducial marks, respectively.
17. The process of claim 16, further comprising a step of forming an organic protection layer on each of the fiducial marks before step of connecting the chip to the circuit substrate using the flip chip interconnect method.