1. An interpolation system comprising:
an interpolator that interpolates between a selected phase from a preceding cycle and a selected phase from a current cycle to provide an interpolated phase for the current cycle, an edge of the interpolated phase for the current cycle having reduced jitter relative to an edge of a corresponding phase of the current cycle; and
a delay system that delays a plurality of other phases of the current cycle to provide delayed other phases, the delayed other phases and the interpolated phase for the current cycle collectively defining a set of adjusted phases for the current cycle.
2. The system of claim 1, wherein the interpolator and the delay system define a first stage of the system, the system further comprising at least one other stage operative to further increase a number of phases for the current cycle based on the set of adjusted phases for the current cycle.
3. The system of claim 2, wherein the at least one other stage comprises:
at least one interpolator that interpolates between respective pairs of the adjusted edges for the current cycle to provide a set of interpolated phases for the current cycle; and
at least one delay system that delays the adjusted phases for the current cycle to provide a delayed set of adjusted phases for the current cycle, the delayed set of adjusted phases for the current cycle being combined with the set of interpolated phases for the current cycle to provide a corresponding set of phases for the current cycle that is greater in number than the set of adjusted phases for the current cycle provided by the first stage.
4. The system of claim 3, wherein the at least one interpolator of the at least one other stage interpolates between edges from each adjacent pair of phases in the set of adjusted phases for the current cycle to provide the set of interpolated phases for the current cycle with corresponding edges that are aligned substantially intermediate each of the adjacent pair of phases in the set of adjusted phases for the current cycle, such that number of phases in the corresponding set of phases for the current cycle is about twice the number of phases in the set of adjusted phases for the current cycle provided by the first stage.
5. The system of claim 1, further comprising a delay component that delays the selected phase of the preceding cycle to provide a delayed phase from the preceding cycle, the interpolator interpolating between the delayed phase from the preceding cycle and the selected phase from the current cycle to provide the interpolated phase for the current cycle.
6. The system of claim 1, wherein the interpolator interpolates between an edge of the selected phase from the preceding cycle and an edge of the selected phase from the current cycle to provide an interpolated edge for a first phase in the set of adjusted phases for the current cycle, the interpolated edge for the first phase in the set of adjusted phases for the current cycle having reduced jitter relative to a corresponding edge of a first phase of the current cycle.
7. The system of claim 6, wherein the edge of the selected phase from the preceding cycle and the edge of the selected phase from the current cycle are rising edges.
8. The system of claim 1, wherein the preceding cycle and the set of adjusted phases for the current cycle have an equal number of phases, the selected phase from the preceding cycle corresponding to a last phase of the preceding cycle and the selected phase from the current cycle corresponding to a second phase of the current cycle, such that the interpolation between the selected phase from the preceding cycle and the selected phase from the current cycle provides a first phase in the set of adjusted phases for the current cycle.
9. The system of claim 1, wherein the delay system is configured to implement delay on the plurality of other phases that substantially approximates time associated with the interpolator performing interpolation to provide the interpolated phase.
10. The system of claim 1, further comprising a delay locked loop that provides a multi-phase signal based on a reference clock signal, the interpolator interpolating between an edge of the selected phase of the multi-phase signal from the preceding cycle and an edge of the selected phase of the multi-phase signal from the current cycle to provide an interpolated edge for a first phase in the set of adjusted phases for the current cycle.
11. A frequency synthesizer comprising the interpolation system of claim 10, the frequency synthesizer further comprising a selection system that is controlled to provide an output clock signal by selecting edges from the set of adjusted phases for the current cycle.
12. The frequency synthesizer of claim 11, wherein the interpolation system further comprising at least one other stage operative to provide a second set of adjusted phases for the current cycle that has a greater number of phases than the set of adjusted phases for the current cycle, the selection system employing the second set of adjusted phases for the current cycle to provide the output clock signal.
13. The system of claim 12, wherein the at least one other stage comprises:
at least one interpolator that interpolates between respective pairs of the adjusted phases for the current cycle to provide a set of interpolated phases for the current cycle; and
at least one delay system that delays the phases for the adjusted current cycle to provide a delayed set of adjusted phases for the current cycle, the delayed set of adjusted phases for the current cycle being combined with the set of interpolated phases for the current cycle to provide the second set of adjusted phases for the current cycle.
14. A system comprising:
a delay locked loop that provides a multi-phase signal based on a reference clock signal; and
an interpolation system, comprising:
an interpolator that interpolates between an edge of a selected phase of the multi-phase signal from a preceding cycle and an edge of a selected phase of the multi-phase signal from the current cycle to provide an edge for an interpolated first phase of the current cycle of the multi-phase signal; and
a delay system that delays a plurality of edges of the multi-phase signal to provide a plurality of delayed phases of the multi-phase signal, the plurality of delayed phases and the interpolated first phase of the current cycle collectively defining an adjusted multi-phase signal for the current cycle, the adjusted multi-phase signal for the current cycle having reduced jitter relative to the multi-phase signal provided by the delay locked loop.
15. The system of claim 14, wherein the interpolator and the delay system define a first stage of the interpolation system, the interpolation system further comprising at least one other stage which comprises:
at least one second interpolator that interpolates between respective pairs of the edges in the adjusted multi-phase signal for the current cycle to provide a set of interpolated phases for the current cycle; and
at least one delay system that delays edges in the adjusted multi-phase signal to provide a delayed set of adjusted phases for the current cycle, the delayed set of adjusted phases for the current cycle being combined with the set of interpolated phases for the current cycle to provide a further adjusted multi-phase signal for the current cycle that has more phases than the adjusted multi-phase signal provided by the first stage of the interpolation system.
16. The system of claim 14, wherein the edge of each of the selected phases corresponds to a rising edge of a respective phase.
17. The system of claim 14, wherein the preceding cycle of the multi-phase signal and the adjusted multi-phase signal for the current cycle have an equal number of phases, the selected phase from the preceding cycle corresponding to a last phase of the preceding cycle and the selected phase from the current cycle corresponding to a second phase of the current cycle, such that the interpolation between the edge of the selected phase from the preceding cycle and the edge of the selected phase from the current cycle provides the first phase in the adjusted multi-phase signal for the current cycle.
18. The system of claim 14, further comprising a delay component that delays the selected phase of the multi-phase signal from the preceding cycle to provide a delayed phase from the preceding cycle, the interpolator interpolating between an edge of the delayed phase from the preceding cycle and the edge of the selected phase of the multi-phase signal from the current cycle to provide the interpolated edge for the first phase of the adjusted multi-phase signal for the current cycle.
19. The system of claim 14, wherein the delay system is configured to implement delay that substantially approximates time associated with the interpolator performing interpolation to provide the interpolated edge for the first phase of the adjusted multi-phase signal for the current cycle.
20. A frequency synthesizer comprising the interpolation system of claim 14, the frequency synthesizer further comprising:
a selection system that receives the adjusted multi-phase signal for the current cycle and is operative to provide an output clock signal having a frequency based on a control signal; and
a control system that provides the control signal to select at least one phase from the adjusted multi-phase signal for the current cycle.
21. The frequency synthesizer of claim 20, wherein the interpolator and the delay system define a first stage of the interpolation system, the interpolation system further comprising at least one other stage that is operative to provide a second adjusted multi-phase signal for the current cycle that has a greater number of phases than the adjusted multi-phase signal for the current cycle provided by the first stage of the interpolation system.
22. A system comprising:
means for interpolating between an edge of a phase from a preceding cycle of a multi-phase signal and an edge of a phase from a current cycle of the multi-phase signal to provide an adjusted edge for an interpolated phase of the current cycle of the multi-phase signal; and
means for delaying other phases of phases of the multi-phase signal to provide a plurality of delayed phases for the current cycle of the multi-phase signal, the plurality of delayed phases and the interpolated phase of the current cycle being combined to provide an adjusted multi-phase signal for the current cycle.
23. The system of claim 22, further comprising means for delaying the selected phase of the multi-phase signal from the preceding cycle to provide a delayed phase from the preceding cycle that has an edge substantially aligned with the edge of the phase from the current cycle of the multi-phase signal, the means for interpolating providing the adjusted edge for the interpolated phase of the multi-phase signal for the current cycle by interpolating between an edge of the delayed phase from the preceding cycle and the edge of the phase from the current cycle of the multi-phase signal.
24. The system of claim 22, further comprising means for generating the multi-phase signal.
25. The system of claim 22, further comprising means for further increasing a number of phases in the adjusted multi-phase signal for the current cycle.
26. The system of claim 25, further comprising means for providing an output signal having a desired frequency based selecting phases from the adjusted multi-phase signal for the current cycle that is provided by the means for further increasing.
27. A method comprising:
receiving a multi-phase signal having a plurality of phases, each of the plurality of phases having a respective edge that exhibits an amount of jitter; and
interpolating between the edge of a selected phase of a preceding cycle of the multi-phase signal and an edge of a selected phase of a current cycle to provide an interpolated edge that exhibits a reduced amount of jitter relative to the amount of jitter associated with the received multi-phase signal.
28. The method of claim 27, further comprising:
delaying other phases of the multi-phase signal to provide a plurality of delayed phases for the current cycle of the multi-phase signal; and
aggregating the plurality of delayed phases of the current cycle and the interpolated phase of the current cycle to provide an aggregated multi-phase signal for the current cycle.
29. The method of claim 28, further comprising:
interpolating between phases of the aggregated multi-phase signal to provide interpolated phases for the current cycle;
delaying the phases of the aggregated multi-phase signal for the current cycle to provide corresponding delayed phases of the aggregated multi-phase signal for the current cycle; and
aggregating the corresponding delayed phases of the aggregated multi-phase signal for the current cycle and the interpolated phases of the aggregated multi-phase signal for the current cycle to provide a second aggregated multi-phase signal for the current cycle that has a greater number of phases for the current cycle than the aggregated multi-phase signal for the current cycle.
30. The method of claim 29, further comprising generating a clock signal by selecting phases from the further aggregated multi-phase signal for the current cycle.
31. The method of claim 28, further comprising generating a clock signal by selecting phases from the aggregated multi-phase signal for the current cycle.
32. The method of claim 27, further comprising delaying the selected phase of the preceding cycle to provide a delayed phase from the preceding cycle, the interpolating being performed between an edge of the delayed phase from the preceding cycle and the edge of the selected phase of the current cycle to provide the interpolated edge for a first phase of the current cycle.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. In an distributed communications network having at least one remote node and one or more local nodes, each local node providing one or more services and at least one local node having a local scheduler, a method for managing upstream communications from the local scheduler, comprising the steps of:
(a) sending a request to transmit data related to a requesting service;
(b) receiving a grant specification from a remote node, said grant specification providing authorization to transmit data related to the requesting service;
(c) considering the needs of a plurality of services, said plurality of services including the requesting service and at least one other service;
(d) scheduling packets for said plurality of services in response to said considering step; and
(e) transmitting a burst based on the scheduled packets to the remote node.
2. A method of claim 1, further comprising the step of evaluating the current state of queues for each of said plurality of services.
3. A method of claim 1, further comprising the step of evaluating at least one of throughput and latency to consider the needs of said plurality of services.
4. A method of claim 1, further comprising the step of drawing data from a higher priority queue prior to drawing data from a lower priority queue to implement said scheduling packets.
5. A method of claim 1, further comprising the step of sending a piggyback bandwidth request with the burst.
6. A method of claim 5, further comprising the step of appending said piggyback bandwidth request to the burst.
7. A method of claim 6, further comprising the step of appending said piggyback bandwidth request to a voice packet.
8. A method of claim 5, further comprising the step of sending said piggyback bandwidth request as a message.
9. A method of claim 5, further comprising the step of sending said piggyback bandwidth request in a header frame.
10. A method of claim 1, further comprising the step of sending multiple piggyback bandwidth requests with the burst.