1. A biasing method comprising the steps of:
providing an amplifier having an amplifier output node;
sensing an output voltage at the amplifier output node; and
generating one or more bias voltages proportional to the output voltage to bias the amplifier.
2. The biasing method of claim 1, wherein the output voltage is sensed using a MOSFET device wherein a gate terminal of the MOSFET device is connected with the amplifier output node.
3. The biasing method of claim 1, wherein the one or more bias voltages are generated by an in-series arrangement of a plurality of resistors.
4. The biasing method of claim 1, further comprising
providing a transistor-resistor stack comprising a plurality of MOSFET devices arranged in a cascode configuration and serially connected with an in-series arrangement of a plurality of resistors wherein:
a gate of one of the MOSFET devices is connected with the amplifier output node to sense the output voltage; and
a current proportional to the output voltage is generated through the plurality of resistors to generate the one or more bias voltages.
5. The biasing method of claim 1, wherein the amplifier comprises a plurality of MOSFET devices arranged in a cascode configuration.
6. A bias circuit connectable, during operation, to an output stage of an amplifier comprising a plurality of amplifier MOSFET devices to produce an output voltage at an amplifier output node, the bias circuit comprising:
a sensing section to sense the amplifier output voltage; and
a biasing section connected with the sensing section to provide, during operation, bias voltages proportional to the output voltage to gate terminals of the amplifier MOSFET devices.
7. The bias circuit of claim 6, wherein the sensing section comprises at least one sensing MOSFET device with a gate terminal connected to the amplifier output node.
8. The bias circuit of claim 6, wherein the sensing section comprises a plurality of sensing MOSFET devices arranged in a cascode configuration wherein a gate terminal of one of the plurality of the sensing MOSFET devices is connected with the amplifier output node.
9. The bias circuit of claim 6, wherein the biasing section comprises an in-series arrangement of resistors.
10. The bias circuit of claim 9, wherein, during operation, a current proportional to the amplifier output voltage is generated through the resistors.
11. A bias circuit connectable, during operation, to an amplifier comprising a plurality of amplifier MOSFET devices to produce an output voltage at an amplifier output node, the bias circuit comprising a plurality of biasing MOSFET devices arranged in a cascode configuration and serially connected with an in-series arrangement of a plurality of resistors wherein during operation:
a gate terminal of one of the MOSFET devices is connected with the amplifier output node; and
a current proportional the amplifier output voltage is generated through the plurality of resistors to provide bias voltages to gate terminals of the plurality of amplifier MOSFET devices.
12. A biasing method comprising the steps of:
providing a differential amplifier with an input common mode node;
sensing an input common mode voltage at the input common mode node; and
producing one or more bias voltages proportional to the input common mode voltage to bias the differential amplifier.
13. The biasing method of claim 12, wherein the output voltage is sensed using a MOSFET device wherein a gate terminal of the MOSFET device is connected with the differential amplifier input common mode node.
14. The biasing method of claim 12, wherein the one or more bias voltages are generated by an in-series arrangement of a plurality of resistors.
15. The biasing method of claim 12, further comprising
providing a transistor-resistor stack comprising a plurality of MOSFET devices arranged in a cascode configuration and serially connected with an in-series arrangement of a plurality of resistors wherein:
a gate of one of the plurality of MOSFET devices is connected with the differential amplifier input common mode node to sense the input common mode voltage; and
a current proportional to the output voltage is generated through the plurality of resistors to produce the one or more bias voltages.
16. The biasing method of claim 12, wherein the amplifier comprises a plurality of MOSFET devices arranged in a cascode configuration.
17. A bias circuit connectable, during operation, to an input stage of a differential amplifier comprising a plurality of amplifier MOSFET devices to produce an input common mode voltage at an amplifier input common mode node, the bias circuit comprising:
a sensing section to sense the amplifier input common mode voltage; and
a biasing section connected with the sensing section to provide, during operation, bias voltages proportional to the input common mode voltage to gate terminals of the amplifier MOSFET devices.
18. The bias circuit of claim 17, wherein the sensing section comprises at least one sensing MOSFET device with a gate terminal connected to the amplifier output node
19. The bias circuit of claim 17, wherein the sensing section comprises a plurality of sensing MOSFET devices arranged in a cascode configuration wherein a gate terminal of one of the plurality of the sensing MOSFET devices is connected with the amplifier input common mode node.
20. The bias circuit of claim 17, wherein the biasing section comprises an in-series arrangement of resistors.
21. The bias circuit of claim 20, wherein during operation a current proportional to the differential amplifier input common mode voltage is generated through the resistors.
22. A bias circuit connectable, during operation, to a differential amplifier comprising a plurality of amplifier MOSFET devices to produce an output voltage at an amplifier input common mode node, the bias circuit comprising a plurality of biasing MOSFET devices arranged in a cascode configuration and serially connected with an in-series arrangement of a plurality of resistors wherein during operation:
a gate terminal of one of the MOSFET devices is connected with the amplifier input common mode node; and
a current proportional the amplifier input common mode voltage is generated through the plurality of resistors to provide bias voltages to gate terminals of the plurality of amplifier MOSFET devices.
23. An amplifier comprising:
an amplifier differential output stage having two complementary sides, each side having an output node and comprising a stack of N-type and P-type MOSFET transistors arranged in series; and
two biasing circuits each comprising:
a first stack comprising:
a plurality of MOSFET devices of a first type arranged in a cascode configuration; and
a plurality of series resistor arranged in series with the plurality of MOSFET devices of the first type; and
a second stack comprising:
a plurality of MOSFET devices of a second type, opposite of the first type, arranged in a cascode configuration; and
a plurality of series resistor arranged in-series with the plurality of MOSFET devices of the second type;
wherein in each biasing circuit:
a gate terminal of one of the plurality of MOSFET devices of the first type and a gate terminal of one of the plurality of MOSFET devices of the second type are connected with the output node of one of the two complementary sides and wherein during operation:
currents proportional to output voltages generated at the output nodes flow through the series resistors within the biasing circuits to produce bias voltages for gate terminals of the N-type and P-type MOSFET transistors of the amplifier differential output stage.
24. An amplifier comprising:
a) an amplifier differential input stage having an input common mode voltage node and a plurality of amplifier MOSFET devices; and
b) a biasing circuit comprising:
b1) a first stack comprising:
a plurality of biasing MOSFET devices of a first type arranged in a cascode configuration; and
a plurality of series resistors arranged in series with the plurality of biasing MOSFET devices of the first type; and
b2) a second stack comprising:
a plurality of biasing MOSFET devices of a second type, opposite of the first type, arranged in a cascode configuration; and
a plurality of series resistors arranged in-series with the plurality of biasing MOSFET devices of the second type;
wherein:
a gate terminal of one of the plurality of biasing MOSFET devices of the first type and gate terminal of one of the plurality of biasing MOSFET devices of the second type are connected with the input common mode node of the amplifier input differential stage and wherein during operation:
currents proportional to an input common mode voltage generated at the input common mode node flow through the series resistors within the biasing circuit to produce bias voltages to gate terminals of the plurality of the amplifier MOSFET devices.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A cell comprising at least a first set of chromosomes of cotton variety 02Z89 wherein a sample of seed of said variety has been deposited under ATCC Accession No. PTA-10476.
2. The cell of claim 1, wherein the cell is a cell of cotton variety 02Z89 wherein a sample of seed of said variety has been deposited under ATCC Accession No. PTA-10476.
3. A plant of cotton variety 02Z89, wherein the plant comprises cells according to claim 2 and wherein a sample of seed of said variety has been deposited under ATCC Accession No. PTA-10476.
4. A plant part of the plant of claim 3, wherein the plant part comprises a cell of cotton variety 02Z89.
5. The plant part of claim 3, further defined as pollen, meristem or an ovule.
6. A tissue culture of regenerable cells according to claim 2.
7. A seed of cotton variety 02Z89, wherein the seed comprises cells according to claim 2 and wherein a sample of seed of said variety has been deposited under ATCC Accession No. PTA-10476.
8. A cotton plant regenerated from the tissue culture of claim 6, wherein the regenerated cotton plant expresses all of the physiological and morphological characteristics of the cotton variety 02Z89, wherein a sample of seed of said variety has been deposited under ATCC Accession No. PTA-10476.
9. A method of producing cotton seed, comprising crossing the plant of claim 3 with itself or a second cotton plant.
10. The method of claim 9, defined as crossing said plant of cotton variety 02Z89, wherein a sample of seed of said variety has been deposited under Accession No. PTA-10476, with a second, distinct cotton plant.
11. An F1 hybrid cotton seed produced by the method of claim 10.
12. An F1 hybrid cotton plant produced by growing the seed of claim 11.
13. A method of producing a cotton plant of cotton variety 02Z89 comprising an added desired trait, the method comprising introducing a transgene conferring the desired trait into the plant of claim 3, wherein a sample of seed of said variety has been deposited under ATCC Accession No. PTA-10476.
14. The method of claim 13, wherein the desired trait is selected from the group consisting of male sterility, herbicide tolerance, insect or pest resistance, disease resistance, modified fatty acid metabolism, modified carbohydrate metabolism and modified cotton fiber characteristics.
15. The method of claim 14, wherein the desired trait is herbicide tolerance and the tolerance is conferred to an herbicide selected from the group consisting of glyphosate, sulfonylurea, imidazalinone, dicamba, glufosinate, phenoxy proprionic acid, cyclohexanedione, triazine, benzonitrile and broxynil.
16. The method of claim 13, wherein the desired trait is insect resistance and the transgene encodes a Bacillus thuringiensis (Bt) endotoxin.
17. A cotton plant produced by the method of claim 13, wherein the plant comprises the desired trait and otherwise comprises all of the physiological and morphological characteristics of cotton variety 02Z89 when grown in the same environmental conditions, wherein a sample of seed of said variety has been deposited under ATCC Accession No. PTA-10476.
18. A method of introducing a single locus conversion into cotton variety 02Z89 comprising:
(a) crossing a plant of variety 02Z89 with a second, distinct plant to produce cotton seed, wherein the second plant comprises a desired single locus, wherein a sample of seed of said variety has been deposited under Accession No. PTA-10476;
(b) growing F1 progeny plants from the seed and selecting at least a first F1 progeny plant that has the single locus to produce selected F1 progeny plants;
(c) crossing the selected progeny plants with at least a first plant of variety 02Z89 to produce backcross progeny plants;
(d) selecting backcross progeny plants that have the single locus and physiological and morphological characteristics of cotton variety 02Z89 to produce selected backcross progeny plants; and
(e) repeating steps (c) and (d) one or more times in succession to produce selected second or higher backcross progeny plants that comprise the single locus and otherwise comprise all of the physiological and morphological characteristics of cotton variety 02Z89 when grown in the same environmental conditions.
19. The method of claim 18, wherein the single locus confers a trait selected from the group consisting of male sterility; herbicide tolerance; insect or pest resistance; disease resistance; modified fatty acid metabolism; modified carbohydrate metabolism; and modified cotton fiber characteristics.
20. The method of claim 19, wherein the trait is tolerance to an herbicide selected from the group consisting of glyphosate, sulfonylurea, imidazalinone, dicamba, glufosinate, phenoxy proprionic acid, cyclohexanedione, triazine, benzonitrile and broxynil.
21. The method of claim 19, wherein the trait is insect resistance and the insect resistance is conferred by a transgene encoding a Bacillus thuringiensis endotoxin.
22. A plant of cotton variety 02Z89, further defined as comprising a single locus conversion, wherein a sample of seed of said variety 02Z89 has been deposited under ATCC Accession No. PTA-10476, wherein said single locus conversion was introduced by backcrossing or transformation.
23. A method of producing an inbred cotton plant derived from the cotton variety 02Z89, the method comprising the steps of:
(a) obtaining cotton seed by crossing a plant of cotton variety 02Z89 with a second, distinct plant, wherein a sample of seed of said variety has been deposited under Accession No. PTA-10476 and growing at least a first seed to produce a progeny plant;
(b) crossing the progeny plant with itself or a second plant to produce a seed of a progeny plant of a subsequent generation;
(c) growing a progeny plant of a subsequent generation from said seed and crossing the progeny plant of a subsequent generation with itself or a second plant; and
(d) repeating steps (b) and (c) for an additional 3-10 generations with sufficient inbreeding to produce an inbred cotton plant derived from the cotton variety 02Z89.
24. A commodity plant product comprising the cell according to claim 1.
25. The commodity plant product of claim 24, wherein the commodity plant product comprises a regenerable plant part of cotton variety 02Z89.