1. A computer implemented method comprising:
determining a representative area of an image, the determining comprising:
determining an absence of faces in the image;
dividing the image into one or more zones; and
selecting a zone with maximum edge strength as the representative area; and
generating a thumbnail by cropping the image to the representative area.
2. The method of claim 1, wherein determining a representative image comprises scaling the image.
3. The method of claim 2, wherein scaling comprises:
determining a first scale factor as a height of the image divided by a height of a size of a thumbnail image;
determining a second scale factor as a width of the image divided by the width of the thumbnail image;
determining that the first scale factor is not equal to the second scale factor; and
scaling the image using the first and the second scale factor to produce a scaled image.
4. The method of claim 1, wherein determining further comprises:
converting the image to a grayscale image;
applying a filter to produce a smoothed image with reduced noise; and
detecting edges in the image to produce an edge-detected image.
5. The method of claim 1, wherein dividing the image comprises:
determining whether a first scale factor is greater than a second scale factor;
dividing the image horizontally when the first scale factor is greater than the second scale factor; and
dividing the image vertically when the second scale factor is greater than the first scale factor.
6. The method of claim 4, further comprising computing a strength of edges for each zone.
7. The method of claim 1, further comprising:
generating a grid of cropped images with uniform aspect ratios.
8. The method of claim 1, further comprising:
generating one or more previews of the image corresponding to one or more effects that can be applied to the image; and
forming the one or more previews into a grid of uniform aspect ratio images.
9. An apparatus comprising a computer having one or more processors for executing instructions comprising:
a face detection module configured to:
detect that a scaled image includes one or more faces;
determine a priority for each of the one or more faces; and
an image processing module configured to:
select a representative area, wherein the representative area includes the one or more faces, when the priority of each of the one or more faces is greater than a predefined threshold; and
generate a thumbnail by cropping the image to the representative area.
10. The apparatus of claim 9, wherein the priority is determined based on at least one of size of a detected face, focus of a detected face, and position of a detected face.
11. The apparatus of claim 9, wherein selecting further comprises:
modifying the representative area to contain a majority of the one or more faces having the priority greater than the predefined threshold.
12. The apparatus of claim 9, wherein the image processing module is further configured to:
generate a grid of cropped images with uniform aspect ratios.
13. The apparatus of claim 9, wherein the image processing module is further configured to:
generate one or more previews of the image corresponding to one or more effects that can be applied to the image; and
form the one or more previews into a grid of uniform aspect ratio images.
14. A non-transitory computer readable medium for storing computer instructions that, when executed by at least one processor causes the at least one processor to perform a method comprising:
determining a representative area of an image, the determining comprising:
determining an absence of faces in the image;
dividing the image into one or more zones; and
selecting a zone with maximum edge strength as the representative area; and
generating a thumbnail by cropping the image to the representative area.
15. The computer readable medium of claim 14, wherein determining a representative image comprises scaling the image.
16. The computer readable medium of claim 15, wherein scaling comprises:
determining a first scale factor as a height of the image divided by a height of a size of a thumbnail image;
determining a second scale factor as a width of the image divided by the width of the thumbnail image;
determining that the first scale factor is not equal to the second scale factor; and
scaling the image using the first and the second scale factor to produce a scaled image.
17. The computer readable medium of claim 14, wherein determining further comprises:
converting the image to a grayscale image;
applying a filter to produce a smoothed image with reduced noise;
detecting edges in the image to produce an edge-detected image; and
computing a strength of edges for each zone.
18. The computer readable medium of claim 14, wherein dividing the image comprises:
determining whether a first scale factor is greater than a second scale factor;
dividing the image horizontally when the first scale factor is greater than the second scale factor; and
dividing the image vertically when the second scale factor is greater than the first scale factor.
19. The computer readable medium of claim 14, further comprising:
generating a grid of cropped images with uniform aspect ratios.
20. The computer readable medium of claim 14, further comprising:
generating one or more previews of the image corresponding to one or more effects that can be applied to the image; and
forming the one or more previews into a grid of uniform aspect ratio images.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A gate isolation structure of a semiconductor device, comprising:
a trench in a silicon substrate; and
a dielectric layer formed on sidewalls and bottom of the trench, the dielectric layer having a first thickness on the sidewalls and a second thickness at the bottom that is greater than the first thickness.
2. The structure of claim 1 wherein the dielectric layer further comprises a gate oxide layer.
3. The structure of claim 2 wherein the dielectric layer further comprises:
a first oxide layer disposed on the sidewalls and the bottom and having a thickness that is substantially uniform; and
a second oxide layer disposed on the bottom in addition to the first oxide layer.
4. The structure of claim 1 wherein the bottom is curved.
5. The structure of claim 4 wherein the second oxide layer substantially conforms to the bottom.
6. A trench field effect transistor formed on a silicon substrate, the trench transistor comprising:
a trench in a silicon substrate;
a dielectric layer formed on sidewalls and bottom of the trench, the dielectric layer having a first thickness on the sidewalls and a second thickness at the bottom that is greater than the first thickness; and
a gate conductive material substantially filling the trench.
7. The transistor of claim 6 wherein the dielectric layer further comprises a gate oxide layer.
8. The transistor of claim 6 further comprising a pair of doped source regions positioned adjacent to and on opposite sides of the trench forming a source electrode of the field effect transistor, and the substrate forming a drain electrode of the field effect transistor.
9. The transistor of claim 6 wherein the bottom is curved.
10. The transistor of claim 6 wherein the dielectric layer further comprises:
a first oxide layer disposed on the sidewalls and the bottom and having a substantially uniform thickness; and
a second oxide layer added to the first oxide layer at the bottom.
11. A method of forming a gate dielectric layer of a trench field effect transistor, the method comprising the steps of:
forming a trench extending into a substrate;
forming a first layer of a dielectric material along sidewalls and bottom of the trench; and
forming a second layer of the dielectric material at the bottom of the trench, whereby, the bottom of the trench is lined with dielectric material with a greater thickness than the dielectric material on the sidewalls of the trench.
12. The method according to claim 11 further comprising the steps of:
forming a layer of oxidation-inhibiting material on the first layer of dielectric material; and
removing a portion of the oxidation-inhibiting material from the bottom of the trench.
13. The method according to claim 11 wherein the dielectric material is silicon dioxide.
14. The method according to claim 12 further comprising the step of removing remaining portions of the oxidation-inhibiting material.
15. The method according to claim 12 wherein the oxidation-inhibiting material is silicon nitride.
16. The method according to claim 11, further comprising the step of masking the silicon proximate the trench with a hard mask to define the formation of the first layer of dielectric material.
17. The method of according to claim 16, further comprising the steps of:
forming a layer of oxidation-inhibiting material over the first layer of dielectric material and the hard mask; and
etching portions of the hard mask from the bottom of the trench and hard mask.
18. The method according to claim 17 wherein the oxidation-inhibiting material is silicon nitride.