1. A method of identifying at least one particular person of interest in a collection of digital images taken over time, comprising:
providing the collection of digital images with each digital image containing one or more persons;
storing in a digital database an appearance model having a set of features associated with the particular person of interest and a prior probability of the person of interest appearing in images by a particular photographer;
comparing the appearance model with features extracted from the digital images in the collection of digital images and using the prior probability and the appearance model to determine if the particular person of interest is in one or more digital images in the collection of digital images and wherein the particular person of interest is the photographer; and
providing image capture information relating to the camera settings used by the particular photographer to change the prior probability of the particular photographer being in the collection of digital images.
2. The method of claim 1 wherein the image capture information further includes the mode of the camera self-timer.
3. The method of claim 2 wherein the prior probability is increased when the person of interest is the photographer and the mode of the camera self-timer is on.
4. The method of claim 2 wherein the prior probability is decreased when the person of interest is the photographer and the mode of the camera self-timer is off.
5. The method of claim 2 wherein the prior probability is increased when the person of interest is other than the particular photographer.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A compute unit having an internal random access memory and at least one register file for providing accelerated handling of an algorithm, the compute unit comprising:
an internal random access memory for storing at least one predetermined mapped function value for each of the most frequently occurring operations of an algorithm;
an input data register for holding the address in said random access memory of at least one mapped function value for a selected operation of the most frequently occurring operations of the algorithm; and
an output register for holding the at least one mapped function value for the selected operation of the most frequently occurring operations of the algorithm read out of said random access memory.
2. The compute unit of claim 1 in which said algorithm is the H.264 CABAC encode normalization process.
3. The compute unit of claim 1 in which said input data register is a compute unit register file.
4. The compute unit of claim 1 in which said output data register is a compute unit register file.
5. The compute unit of claim 2 in which said input data register comprises a range number of normalization bits field, a number of outstanding bits field and a value MSB bits field.
6. The compute unit of claim 2 in which said output register comprises a value MSB bit field, a new outstanding bits field, a number of bits to write to FIFO field and the value of bits to write to FIFO field.
7. The compute unit of claim 1 in which said input data register includes a plurality of fields.
8. The compute unit of claim 1 in which said output data register includes a plurality of fields.
9. The compute unit of claim 2 in which said random access memory look up table includes a value MSB function, a number of outstanding bits, a number of bits to write to FIFO, and the bit stream sequence.
10. The compute unit of claim 1 in which successive addresses in said input data register are not dependent on each other.
11. The compute unit of claim 1 in which said random access memory includes a look up table.
12. The compute unit of claim 1 in which said algorithm is the H.264 CABAC decode process.
13. The compute unit of claim 12 in which said random access memory look up table includes a rLPS, an MPS State and a valid flag mapping functions.
14. The compute unit of claim 12 in which said input data register has a state, a range and value fields.
15. The compute unit of claim 12 in which said output register has an rLPs, MPS-State and a valid field.
16. In a compute unit having an internal random access memory and at least one register file, a method for providing accelerated handling of an algorithm, the method comprising:
storing in an internal random access memory at least a predetermined mapped function value for each of the most frequently occurring operations of an algorithm;
holding in an input data register the address in said random access memory of at least one mapped function value for a selected operation of the most frequently occurring operations of the algorithm; and
holding in an output register the at least one mapped functional value for the selected operation of the most frequently occurring operations of the algorithm read out of said random access memory.
17. The method of claim 16 in which said algorithm is the H.264 CABAC encode normalization process.
18. The method of claim 16 in which said input data register is a compute unit register file.
19. The method of claim 16 in which said output data register is a compute unit register file.
20. The method of claim 17 in which said input data register comprises a range number of normalization bits field, a number of outstanding bits field and a value MSB bits field.
21. The method of claim 17 in which said output register comprises a value MSB bit field, a new outstanding bits field, a number of bits to write to FIFO field, and the value of bits to write to FIFO field.
22. The method of claim 16 in which said input data register includes a plurality of fields.
23. The method of claim 16 in which said output data register includes a plurality of fields.
24. The method of claim 17 in which said random access memory look up table includes a value MSB function, a number of outstanding bits, a number of bits to write to FIFO, and the bit stream sequence.
25. The method of claim 16 in which successive addresses in said input data register are not dependent on each other.
26. The method of claim 16 in which said random access memory includes a look up table.
27. The method of claim 16 in which said algorithm is the H.264 CABAC decode process.