1. A memory system comprising:
a memory device which includes a memory unit to store data;
a controller to access said memory unit; and
an optical transmission line which is provided between said memory unit and said controller, wherein
said controller comprises:
a first serial converting unit which converts a parallel command signal, address signal, and write signal into a first serial signal in order to readwrite data fromto said memory unit;
a first optical converting unit to output to said memory device said first serial signal as a first optical signal with a single wavelength via said optical transmission line; and
a first parallel converting unit to convert a second optical signal supplied from said memory device into a parallel read data signal, and
said memory device comprises:
a second parallel converting unit to convert said first optical signal into the original parallel command signal, address signal, and write data signal and output the converted parallel signals to said memory unit;
a second serial converting unit to convert a parallel read data signal from said memory unit into a second serial signal; and
a second optical converting unit to output to said controller said second serial signal as said second optical signal with a single wavelength via said optical transmission line, and wherein:
before starting readingwriting data fromto said memory unit, said controller outputs, as said first optical signal, to said memory device, a first synchronous clock to synchronize an operation of said memory device with an operation of said controller;
said memory device generates a second synchronous clock synchronized with said first synchronous clock and outputs the generated second synchronous clock as said second optical signal; and
said controller starts readingwriting data fromto said memory unit in response to reception of said second synchronous clock.
2. The memory system according to claim 1, wherein:
said memory unit has plural operation modes; and
in response to the reception of said second synchronous clock, said controller further outputs as said first optical signal a command signal to set an operation mode of said memory unit to any one of said operation modes, outputs as said first optical signal a command signal to read the operation mode set in said memory unit, and starts readingwriting data fromto said memory unit when said second optical signal outputted from said memory device indicates a correct operation mode.
3. The memory system according to claim 2, wherein:
when said second optical signal outputted from said memory device indicates an incorrect operation mode, said controller outputs again said first synchronous clock as said first optical signal to synchronize the operation of said memory device without starting readingwriting data fromto said memory unit.
4. The memory system according to claim 1, wherein:
said controller outputs said first synchronous clock to said memory device at intervals even after starting readingwriting data fromto said memory unit; and
said memory device outputs said read data signal as said second optical signal to said controller during a period which does not overlap with a period in which said first synchronous clock is output.
5. The memory system according to claim 1, wherein
said optical transmission line includes a single optical transmission line through which said command signal, said address signal, said write data signal, and said read data signal are transmitted as said first and second optical signals.
6. The memory system according to claim 1, wherein
said optical transmission line includes a first optical transmission line through which said command signal and said address signal are transmitted as said first optical signal and of a second optical transmission line through which said write data signal and said read data signal are transmitted as said first and second optical signals.
7. A memory system comprising:
a memory device which includes a memory unit to store data;
a controller to access said memory unit; and
an optical transmission line which is provided between said memory unit and said controller, wherein
said controller comprises:
a first serial converting unit to converts a parallel command signal, address signal, and write signal into a first serial signal in order to readwrite data fromto said memory unit;
a first optical converting unit to output to said memory device said first serial signal as a first optical signal with a single wavelength via said optical transmission line; and
a first parallel converting unit to convert a second optical signal supplied from said memory device into a parallel read data signal, and
said memory device comprises:
a second parallel converting unit to convert said first optical signal into the original parallel command signal, address signal, and write data signal and output the converted parallel signals to said memory unit;
a second serial converting unit to convert a parallel read data signal from said memory unit into a second serial signal; and
a second optical converting unit to output to said controller said second serial signal as said second optical signal with a single wavelength via said optical transmission line, and wherein:
said optical transmission line includes a first optical transmission line through which said command signal, said address signal, said write data signal, and part of said read data signal are transmitted as said first and second optical signals and of a second optical transmission line through which remainder of said read data signal is transmitted as said second optical signal.
8. A memory system comprising:
a memory device which includes a memory unit to store data;
a controller to access said memory unit; and
an optical transmission line which is provided between said memory unit and said controller, wherein
said controller comprises:
a first serial converting unit to convert a parallel command signal, address signal, and write signal into a first serial signal in order to readwrite data fromto said memory unit;
a first optical converting unit to output to said memory device said first serial signal as a first optical signal with a single wavelength via said optical transmission line; and
a first parallel converting unit to convert a second optical signal supplied from said memory device into a parallel read data signal, and
said memory device comprises:
a second parallel converting unit to convert said first optical signal into the original parallel command signal, address signal, and write data signal and output the converted parallel signals to said memory unit;
a second serial converting unit to convert a parallel read data signal from said memory unit into a second serial signal; and
a second optical converting unit to output to said controller said second serial signal as said second optical signal with a single wavelength via said optical transmission line, and wherein:
said memory device comprises plural kinds of memory units;
said controller outputs a device signal to said memory device as said first optical signal together with said parallel command signal, address signal and write data signal, the device signal indicating a memory unit to be accessed; and
said memory device outputs a device signal to said controller as said second optical signal together with said read data signal, the device signal indicating an accessed memory unit.
9. The memory system according to claim 8, wherein
said controller outputs an order signal to said memory device as said first optical signal together with said parallel command signal, address signal and write data signal, the order signal indicating an order in which memory units are accessed; and
said memory device outputs said order signal to said controller as said second optical signal together with said read data signal.
10. The memory system according to claim 8, wherein
said optical transmission line includes a single optical transmission line through which said command signal, said address signal, said write data signal, and said read data signal are transmitted as said first and second optical signals.
11. The memory system according to claim 8, wherein
said optical transmission line includes a first optical transmission line through which said command signal and said address signal are transmitted as said first optical signal and of a second optical transmission line through which said write data signal and said read data signal are transmitted as said first and second optical signals.
12. The memory system according to claim 8, wherein
said optical transmission line includes a first optical transmission line through which said command signal, said address signal, said write data signal, and part of said read data signal are transmitted as said first and second optical signals and of a second optical transmission line through which remainder of said read data signal is transmitted as said second optical signal.
13. The memory system according to claim 8, wherein
said optical transmission line includes an optical transmission line dedicated for each of said memory units.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A printed antenna comprises:
first dipole antenna section having a first radiation section and a first frequency section; and
second dipole antenna section having a second radiation section and a second frequency section, wherein the second dipole antenna is electrically coupled to the first dipole antenna such that currents of the first and second frequency sections substantially cancel and currents of the first and second radiation sections are substantially cumulative.
2. The printed antenna of claim 1 further comprises at least one of:
the first and second dipole antenna sections on at least one layer of a printed circuit board; and
the first and second dipole antenna sections on at least one layer of an integrated circuit.
3. The printed antenna of claim 1 further comprises:
the first and second dipole sections having a combined length of approximately one-half wavelength of a frequency of signals received or transmitted via the printed antenna.
4. The printed antenna of claim 1 further comprises:
the first and second dipole sections having a combined geometric shape that approximates a sinXX waveform.
5. The printed antenna of claim 1 further comprises:
a ground plane printed on another layer and is substantially parallel to the printed antenna.
6. The printed antenna of claim 1 further comprises:
the first and second frequency sections have approximately symmetrical geometric shapes; and
the first and second radiating sections have approximately symmetrical geometric shapes.
7. The printed antenna of claim 1 further comprises:
an inputoutput connection located at a determined position within the first dipole antenna section or the second dipole antenna section to obtain a desired load impedance.
8. The printed antenna of claim 7, wherein the inputoutput connection comprises at least one of:
a coaxial probe, a printed microstrip, a waveguide, and a coplanar transmission line.
9. A printed antenna comprises:
first dipole antenna section having a first radiation section and a first frequency section; and
second dipole antenna section having a second radiation section and a second frequency section, wherein the second dipole antenna is electrically coupled to the first dipole antenna such that currents of the first and second frequency sections are substantially cumulative and currents of the first and second radiation sections substantially cancel.
10. The printed antenna of claim 9 further comprises:
the first and second dipole sections having a combined length of approximately one wave length of a frequency of signals received or transmitted via the printed antenna.
11. The printed antenna of claim 9 further comprises:
the first and second dipole sections having a combined geometric shape that approximates a sinXX waveform.
12. The printed antenna of claim 9 further comprises:
a ground plane printed on another layer and is substantially parallel to the printed antenna.
13. The printed antenna of claim 9 further comprises:
the first and second frequency sections have approximately symmetrical geometric shapes; and
the first and second radiating sections have approximately symmetrical geometric shapes.
14. The printed antenna of claim 9 further comprises:
an inputoutput connection located at a determined position within the first dipole antenna section or the second dipole antenna section to obtain a desired load impedance.
15. The printed antenna of claim 14, wherein the inputoutput connection comprises at least one of:
a coaxial probe, a printed microstrip, a waveguide, and a coplanar transmission line.
16. A radio comprises:
receiver section;
transmitter section;
printed antenna; and
antenna switch operable to connect either the receiver section or the transmitter section to the printed antenna, wherein the printed antenna includes:
first dipole antenna section having a first radiation section and a first frequency section; and
second dipole antenna section having a second radiation section and a second frequency section, wherein the second dipole antenna is electrically coupled to the first dipole antenna such that currents of the first and second frequency sections substantially cancel and currents of the first and second radiation sections are substantially cumulative.
17. The radio of claim 16, wherein the printed antenna further comprises:
the first and second dipole sections having a combined length of approximately one-half wavelength of a frequency of signals received or transmitted via the printed antenna.
18. The radio of claim 16, wherein the printed antenna further comprises:
the first and second dipole sections having a combined geometric shape that approximates a sinXX waveform.
20. The radio of claim 16, wherein the printed antenna further comprises:
a ground plane printed on another layer and is substantially parallel to the printed antenna.
21. The radio of claim 16, wherein the printed antenna further comprises:
the first and second frequency sections have approximately symmetrical geometric shapes; and
the first and second radiating sections have approximately symmetrical geometric shapes.
22. The radio of claim 16, wherein the printed antenna further comprises:
an inputoutput connection located at a determined position within the first dipole antenna section or the second dipole antenna section to obtain a desired load impedance.
23. A radio comprises:
receiver section;
transmitter section;
printed antenna; and
antenna switch operable to connect either the receiver section or the transmitter section to the printed antenna, wherein the printed antenna includes:
first dipole antenna section having a first radiation section and a first frequency section; and
second dipole antenna section having a second radiation section and a second frequency section, wherein the second dipole antenna is electrically coupled to the first dipole antenna such that currents of the first and second frequency sections are substantially cumulative and currents of the first and second radiation sections substantially cancel.
24. The radio of claim 23, wherein the printed antenna further comprises:
the first and second dipole sections having a combined length of approximately one wave length of a frequency of signals received or transmitted via the printed antenna.
25. The radio of claim 23, wherein the printed antenna further comprises:
the first and second dipole sections having a combined geometric shape that approximates a sinXX waveform.
26. The radio of claim 23, wherein the printed antenna further comprises:
a ground plane printed on another layer and is substantially parallel to the printed antenna.
27. The radio of claim 23, wherein the printed antenna further comprises:
the first and second frequency sections have approximately symmetrical geometric shapes; and
the first and second radiating sections have approximately symmetrical geometric shapes.
28. The radio of claim 23, wherein the printed antenna further comprises:
an inputoutput connection located at a determined position within the first dipole antenna section or the second dipole antenna section to obtain a desired load impedance.