1. A photovoltaic device comprising;
a first electrode;
a second electrode; and
a p-type window layer, a buffer layer, a light absorbing layer and an n-type layer, which are sequentially stacked between the first, electrode and the second electrode,
wherein, when the p-type window layer is composed of hydrogenated amorphous silicon oxide, the buffer layer is composed of either hydrogenated amorphous silicon carbide or hydrogenated amorphous silicon oxide,
and wherein, when the p-type window layer is composed of hydrogenated amorphous silicon carbide, the buffer layer is composed of hydrogenated amorphous silicon oxide.
2. The photovoltaic device of claim 1, wherein the hydrogen concentration of the buffer layer is greater than that of the p-type window layer.
3. The photovoltaic device of claim 2, wherein the hydrogen contents of the p-type window layer and the buffer layer are equal to or more than 10 atomic % and equal to or less than 25 atomic %.
4. The photovoltaic device of claim 1, wherein the impurity concentration of the buffer layer is less than that of the p-type window layer.
5. The photovoltaic device of claim 4, wherein the impurity concentration of the p-type window layer is equal to or greater than 1\xd71019 cm\u22123 and equal to or less than 1\xd71021 cm\u22123, and wherein the impurity concentration of the buffer layer is equal to or greater than 1\xd71016 cm\u22123 and equal to or less than 5\xd71019 cm\u22123.
6. The photovoltaic device of claim 1, wherein the thickness of the p-type window layer is equal to or larger than 12 nm and equal to or less than 17 nm.
7. The photovoltaic device of claim 1, wherein the thickness of the buffer layer is equal to or larger than 3 nm and equal to or less than 8 nm.
8. The photovoltaic device of claim 1, wherein the oxygen content or carbon content of the p-type window layer is equal to or more than 5 atomic % and equal to or less than 40 atomic %, and wherein the carbon content or oxygen content of the buffer layer is equal to or higher than 0.5 atomic % and equal to or less than 3 atomic %.
9. A method for manufacturing a photovoltaic device, the method comprising:
forming a first electrode;
forming a p-type window layer, a buffer layer, a light absorbing layer and an n-type layer, which are sequentially stacked on the first electrode in the order listed from a light incident side; and
forming a second electrode on the p-type window layer, the buffer layer, the light absorbing layer and the n-type layer, which are sequentially stacked from the light incident side,
wherein, the p-type window layer is composed of hydrogenated amorphous silicon carbide, the buffer layer is composed of hydrogenated amorphous silicon oxide,
wherein, when the buffer layer and the p-type window layer are formed, silane and impurity source gas are introduced into a process chamber,
wherein, when the p-type window layer is formed, a ratio of the flow rate of the impurity source gas to the flow rate of the silane is equal to or greater than 5000 ppm and equal to or less than 50000 ppm, and
wherein the carbon content of the p-type window layer is equal to or more than 5 atomic % and equal to or less than 40 atomic %.
10. The method of claim 9, wherein the hydrogen concentration of the buffer layer is greater than that of the p-type window layer.
11. The method of claim 9, wherein the impurity concentration of the buffer layer is less than that of the p-type window layer.
12. The method of claim 9, wherein, when the buffer layer is formed, a ratio of the flow rate of the impurity source gas to the flow rate of the silane is equal to or greater than 100 ppm and equal to or less than 2000 ppm.
13. The method of claim 9, wherein the thickness of the p-type window layer is equal to or larger than 12 nm and equal to or less than 17 nm.
14. The method of claim 9, wherein the thickness of the buffer layer is equal to or larger than 3 nm and equal to or less than 8 nm.
15. The method of claim 9, wherein the oxygen content of the buffer layer is equal to or higher than 0.5 atomic % and equal to or less than 3 atomic %.
16. The method of claim 9, wherein, when the p-type window layer is formed, the concentration of the silane introduced into a deposition chamber is equal to or greater than 4% and equal to or less than 10%.
17. The method of claim 9, wherein, when the buffer layer is formed, the concentration of the silane introduced into a deposition chamber is equal to or greater than 0.5% and equal to or less than 5%.
18. The method of claim 9, wherein the p-type window layer and the buffer layer are formed in one deposition chamber without an exhausting process.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A solid-state image pickup apparatus comprising:
a plurality of two-dimensionally arrayed unit pixels, each of the unit pixels including an optical-electrical conversion element performing optical-electrical conversion of an incident light;
a charge conversion element and two output terminals provided for each of a plurality of pixel groups, each pixel group including one or more of the unit pixels, the charge conversion element converting a signal charge optical-electrical converted by the optical-electrical conversion element of each of the unit pixels in the pixel group into a voltage or current, and the two output terminals being capable of outputting a noise signal that occurs at the time of resetting the charge conversion element and a signal-noise sum signal obtained by adding a signal that has occurred by optical-electrical conversion to the noise signal separately;
a plurality of first transfer lines to which ones of the output terminal pairs of a plurality of the pixel groups are connected in common, the plurality of first transfer lines being capable of holding voltages based on the noise signals outputted from the output terminals;
a plurality of second transfer lines to which the others of the output terminal pairs of the plurality of the pixel groups are connected in common, the plurality of second transfer lines being capable of holding voltages based on the signal-noise sum signals outputted from the output terminals;
first switches arranged between the ones of the output terminal pairs and the first transfer lines;
second switches arranged between the others of the output terminal pairs and the second transfer lines;
a third switch provided for each of the first transfer lines;
a fourth switch provided for each of the second transfer lines;
a third transfer line to which the plurality of first transfer lines are connected in parallel via the third switches, respectively; and
a fourth transfer line to which the plurality of second transfer lines are connected in parallel via the fourth switches, respectively.
2. The solid-state image pickup apparatus according to claim 1, wherein
the first transfer lines and the second transfer lines extend linearly in a first direction at an interval in parallel; and
each of the pixel groups includes two unit pixels arrayed adjoining each other in a direction crossing the first direction.
3. The solid-state image pickup apparatus according to claim 1, comprising:
first reset parts resetting the first transfer lines to a first reset state; and
second reset parts resetting the second transfer lines to a second reset state.
4. The solid-state image pickup apparatus according to claim 3, comprising a pixel selection part selecting the unit pixel to be caused to output a signal to the first transfer line or the second transfer line from the output terminal of the pixel group; wherein
the solid-state image pickup apparatus causes the first transfer line to be in a floating potential state by, after causing the first reset part to be in an ON state to be in a first reset state, switching the first reset part to an OFF state;
stores a noise signal outputted from the unit pixel selected by the pixel selection part into the first transfer line in the floating potential state by reading out the noise signal to the first transfer line for a predetermined time;
causes the second transfer line to be in a floating potential state by, after causing the second reset part to be in an ON state to be in a second reset state, switching the second reset part to an OFF state;
stores a signal-noise sum signal outputted from the unit pixel selected by the pixel selection part into the second transfer line in the floating potential state by reading out the signal-noise sum signal to the second transfer line for a predetermined time;
reads out the noise signal stored in the first transfer line to the third transfer line via the third switch; and
reads out the signal-noise sum signal stored in the second transfer line to the fourth transfer line via the fourth switch.
5. The solid-state image pickup apparatus according to claim 1, comprising:
a pixel selection part selecting the unit pixel to be caused to output a signal to the first transfer line or the second transfer line from the output terminal of the pixel group;
first constant current circuit elements turning onoff supply of a constant current to the first transfer lines; and
second constant current circuit elements turning onoff supply of a constant current to the second transfer lines; wherein
the solid-state image pickup apparatus stores the noise signal outputted from the unit pixel selected by the pixel selection part into the first transfer line by, after reading out the noise signal to the first transfer line for a predetermined time, causing the first constant current circuit element to be in an OFF state while supplying a constant current to the first transfer line with the first constant current circuit element turned on;
stores the signal-noise sum signal outputted from the unit pixel selected by the pixel selection part into the second transfer line by, after reading out the signal-noise sum signal to the second transfer line for a predetermined time, causing the second constant current circuit element to be in an OFF state while supplying a constant current to the second transfer line with the second constant current circuit element turned on;
reads out the noise signal stored in the first transfer line to the third transfer line via the third switch; and
reads out the signal-noise sum signal stored in the second transfer line to the fourth transfer line via the fourth switch.