1. A method comprising:
detecting, by a processor executing a guest operating system of a virtual machine, when a measure of system load for a virtual processor exceeds a threshold; and
in response to the detection, transmitting to a hypervisor, by the guest operating system, a request for an additional virtual processor for the virtual machine, wherein a memory of the virtual machine is non-uniform memory access (NUMA), wherein the request by the guest operating system specifies a virtual NUMA node within the virtual machine for the additional virtual processor, and wherein the measure of system load for the virtual processor is based on a percentage of processor cycles consumed by context switches between threads executed by the virtual machine, a count of context switches per unit of time between threads executed by the virtual processor and a count of threads in a runnable state executing concurrently.
2. The method of claim 1 wherein the measure of system load pertains to a first virtual processor of the virtual machine.
3. The method of claim 1 wherein the measure of system load pertains to all virtual processors of the virtual machine.
4. The method of claim 1 wherein the measure of system load pertains to a first set of virtual processors belonging to a particular virtual NUMA node within the virtual machine.
5. The method of claim 1 wherein the context switches are between threads belonging to different processes.
6. The method of claim 1 wherein the context switches are between threads belonging to the same process.
7. The method of claim 1, further comprising receiving an indication that the request was granted along with an identifier of the additional virtual processor in response to the request.
8. An apparatus comprising:
a memory to store a virtual machine; and
a processor, operatively coupled to the memory, to:
execute the virtual machine,
detect, via a guest operating system of the virtual machine, when a measure of system load for a virtual processor exceeds a threshold, and
in response to the detection, transmitting to a hypervisor, via the guest operating system, a request for an additional virtual processor for the virtual machine, wherein the measure of system load for the virtual processor is based on a percentage of processor cycles consumed by context switches between threads executed by the virtual machine, a count of context switches per unit of time between threads executed by the virtual processor and a count of threads in a runnable state executing concurrently.
9. The apparatus of claim 8 wherein the request specifies a proximity domain of the virtual machine for the additional virtual processor.
10. The apparatus of claim 9 wherein the memory is non-uniform memory access (NUMA), and wherein the proximity domain is a virtual NUMA node.
11. The apparatus of claim 8 wherein the measure of system load pertains to a first virtual processor of the virtual machine.
12. The apparatus of claim 8 wherein the measure of system load pertains to all virtual processors of the virtual machine.
13. The apparatus of claim 8 wherein the context switches are between threads belonging to different processes.
14. The apparatus of claim 8 wherein the context switches are between threads belonging to the same process.
15. The apparatus of claim 8 wherein the processor is further to receive, in response to the request, an indication that the request was granted along with an identifier of the additional virtual processor.
16. A non-transitory computer readable storage medium, having instructions stored therein, which when executed, cause a processor to:
detect, by a guest operating system of a virtual machine, when a measure of system load for a virtual processor exceeds a threshold;
in response to the detection, transmit to a hypervisor, by the guest operating system, a request for an additional virtual processor for the virtual machine, wherein a memory of the virtual machine is non-uniform memory access (NUMA), wherein the request by the guest operating system specifies for the additional virtual processor a highly-loaded virtual NUMA node within the virtual machine, and wherein the measure of system load for the virtual processor is based on a percentage of processor cycles consumed by context switches between threads executed by the virtual machine, a count of context switches per unit of time between threads executed by the virtual processor and a count of threads in a runnable state executing concurrently.
17. The non-transitory computer readable storage medium of claim 16 wherein the measure of system load is in view of a number of threads in a runnable state executing concurrently.
18. The non-transitory computer readable storage medium of claim 16 wherein the measure of system load is further based on a number of processes in a runnable state executing concurrently.
19. The non-transitory computer readable storage medium of claim 16 wherein the measure of system load is in view of a number of applications in a runnable state executing concurrently.
20. The non-transitory computer readable storage medium of claim 16 wherein the instructions further cause the processing device to receive an indication that the request was granted along with an identifier of the additional virtual processor in response to the request.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method, comprising:
assigning a tag to a transaction in which a data frame is at least one of transmitted or received by a source functional block, a destination functional block, and one or more intermediate functional blocks coupled along a data path such that the data frame is moved from one functional block to the next;
discovering, by at least one of said intermediate functional blocks, if an error occurs in said data frame; and
associating said error with said tag and generating a flush command that is propagated through the functional blocks to said at least one intermediate functional block to flush data frames associated with said tag.
2. The method of claim 1, wherein:
said tag comprises identification data associated with an inputoutput (IO).
3. The method of claim 2, wherein:
said IO comprises a transaction of at least one of a data read or data write.
4. The method of claim 1, wherein:
assigning a tag is performed, at least in part, by processor circuitry capable of exchanging at least one of commands or data with one or more of said functional blocks.
5. The method of claim 4, wherein:
said processor circuitry is also capable of receiving a transaction request, and further capable of assigning said tag to said at least one transaction in response to said transaction request.
6. The method of claim 1, wherein:
said functional block comprising circuitry capable of, at least one of, transmitting or receiving at least one said data frame.
7. The method of claim 1, further comprising:
generating a command indicating that processing of said at least one data packet associated with said tag is complete.
8. An article, comprising:
a storage medium having stored thereon instructions that when executed by a machine results in the following:
assigning a tag to a transaction in which a data frame is at least one of transmitted or received by a source functional block, a destination functional block, and one or more intermediate functional blocks coupled along a data path such that the data frame is moved from one functional block the next;
discovering, by at least one of said intermediate functional blocks, if an error occurs in said data frame; and
associating said error with said tag generating a flush command that is propagated through the functional blocks to said at least one intermediate functional block to flush data frames associated with said tag.
9. The article of claim 8, wherein:
said tag comprises identification data associated with an inputoutput (IO).
10. The article of claim 9, wherein:
said IO comprises a transaction of at least one of a data read or data write.
11. The article of claim 8, wherein:
assigning a tag is performed, at least in part, by processor circuitry capable of exchanging at least one of commands or data with one or more of said functional blocks.
12. The article of claim 11, wherein:
said processor circuitry is also capable of receiving a transaction request, and further capable of assigning said tag to said at least one transaction in response to said transaction request.
13. The article of claim 8, wherein:
at least one of said functional blocks comprises circuitry capable of, at least one of transmitting or receiving at least one said data frame.
14. The article of claim 8, further comprising:
generating a command indicating that processing of said at least one data packet associated with said tag is complete.
15. A system, comprising:
a circuit card including an integrated circuit, the circuit card capable of being coupled to a bus, the integrated circuit comprising processor circuitry capable of exchanging at least one of commands or data with a plurality of functional blocks including a source functional block, a destination functional block, and one or more intermediate functional blocks coupled along a data path such that the command or data is moved from one functional block to the next, each of said functional blocks being capable of at least one of transmitting or receiving a data frame,
said processor circuitry is further capable of
discovering, by at least one of said intermediate functional blocks, if an error occurs in said data frame,
assigning a tag to a transaction in which a data frame is at least one of transmitted or received by one or more of said plurality of functional blocks,
associating said error with said tag, and
generating a flush command that is propagated through the functional blocks to said at least one intermediate functional block to flush data frames associated with said tag.
16. The system of claim 15, wherein:
said source functional block is capable of starting a transmission of said data frame to said one or more intermediate functional blocks, and said destination functional block comprises a destination for said data frame.
17. The system of claim 16, wherein:
said processor circuitry is also capable of determining which functional block, among the plurality of said functional blocks, discovered said error, said processor circuitry further capable of commanding said source functional block to flush at least one data frame associated with said tag and propagating a command to flush a data frame associated with said tag to at least one of said intermediate functional blocks and said destination functional block.
18. The system of claim 17, wherein:
said processor circuitry is also capable of terminating said command to flush a data frame when said command to flush a data frame is transmitted to said functional block responsible for discovering said error.
19. The system of claim 15, wherein:
said tag comprises identification data associated with an inputoutput (IO).
20. The system of claim 19, wherein:
said IO comprises a transaction of at least one of a data read or data write in which said data frame is at least one of transmitted or received by at least one functional block.
21. The system of claim 15, wherein:
said processor circuitry is also capable of receiving a transaction request from at least one of said plurality of functional blocks, and further capable of assigning said tag to a transaction in response to said transaction request.
22. The system of claim 15, wherein:
at least one of said plurality of functional blocks comprises circuitry capable of, at least one of, transmitting or receiving a data frame.
23. The system of claim 15, wherein:
said processor circuitry is further capable of terminating said flush command when said flush command reaches a functional block that discovered said error.
24. The method of claim 16, further comprising:
generating, by said functional block that discovered said error, a command indicating that data processing for said transaction is complete, and propagating said a command indicating that data processing for said transaction is complete to said destination functional block.