1. A compound of formula (I):
wherein:
R1 is C1-C8alkyl or LR2;
L is alkylene;
R2 is
a) hydroxy;
b) alkoxy;
c) OR3 wherein R3 is P(O)(OH)2 or alkoxy;
d) heterocyclyl optionally substituted with oxo or C1-C8alkyl;
e) C(O)OR4 wherein R4 is H, C1-C8alkyl, or XR5 wherein X is alkylene and R5 is C6-C10aryl, heterocyclyl, or NR6R7 wherein R6 and R7 are independently selected from the group consisting of H and C1-C8alkyl;
f) NR6R7;
g) C(O)NR8R9 wherein R8 and R9 are independently selected from the group consisting of H and XR5; or
h) C(O)R10 wherein R10 is heterocyclyl optionally substituted with XR11 wherein R11 is heterocyclyl;
or a pharmaceutically acceptable salt thereof.
2. The compound of formula (I) according to claim 1 wherein R1 is LR2 wherein R2 is hydroxy, alkoxy, OR3 or C(O)OR4.
3. The compound of formula (I) according to claim 1 wherein R1 is LR2 wherein R2 is OR3 wherein R3 is P(O)(OH)2.
4. A compound selected from the group consisting of:
{(4aS,13aR)-8-({(2,4-Difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl methyl carbonate;
{(4aS,13aR)-8-({(2,4-Difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl 2-(methyloxy)ethyl carbonate;
Methyl ({({(4aS,13aR)-8-({(2,4-difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl)oxycarbonyl}oxy)acetate;
{(4aS,13aR)-8-({(2,4-Difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl 2-(4-morpholinyl)ethyl carbonate;
{(4aS,13aR)-8-({(2,4-Difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl 2-hydroxyethyl carbonate;
{(4aS,13aR)-8-({(2,4-Difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl 2-(phosphonooxy)ethyl carbonate;
{(4aS,13aR)-8-({(2,4-Difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl 3-hydroxypropyl carbonate;
{(4aS,13aR)-8-({(2,4-Difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl 3-(phosphonooxy)propyl carbonate;
and pharmaceutically acceptable salts thereof.
5. A compound which is {(4aS,13aR)-8-({(2,4-Difluorophenyl)methylamino}carbonyl)-9,11-dioxo-2,3,4a,5,9,11,13,13a-octahydro-1H-pyrido1,2-apyrrolo1\u2032,2\u2032:3,4imidazo1,2-dpyrazin-10-yloxy}methyl 2-(methyloxy)ethyl carbonate.
6. The compound according to any one of claims 1 to 5, wherein the compound is a pharmaceutically acceptable salt thereof.
7. The compound according to claim 6, wherein the pharmaceutically acceptable salt is a sodium salt.
8. A pharmaceutical composition comprising an effective amount of a compound according to any one of claims 1 to 5 together with a pharmaceutically acceptable carrier.
9. The pharmaceutical composition according to claim 8 in the form of a tablet, capsule, liquid or suspension.
10. A pharmaceutical composition comprising a compound according to claim 7 together with a pharmaceutically acceptable carrier.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A memory structure, comprising:
a semiconductor substrate;
a contact plug;
a storage node formed over the semiconductor substrate, the storage node comprising a layer of polysilicon on a surface of silicon-containing material, the layer of polysilicon comprising at least one of HSG polysilicon and CSG polysilicon, the silicon-containing material being in contact with said contact plug, and the silicon-containing material having an ion concentration that is in a range from about 11015 ions per cm3 of silicon-containing material to about 11022 ions per cm3 of silicon-containing material, wherein said ion concentration presents an ion concentration gradient in said silicon-containing material, said storage node comprising:
a base in contact with said contact plug; and
a free-standing wall extending from said base and having opposing nonplanar surfaces, wherein said free-standing wall has a shape that is partly determined by said ion concentration gradient;
a dielectric layer upon said storage node; and
an electrically conductive cell plate upon said dielectric layer.
2. The memory structure as defined in claim 1, further comprising a contact plug in contact with:
the semiconductor substrate; and
the silicon-containing material.
3. The memory structure as defined in claim 2, further comprising:
a pair of gate regions on the semiconductor substrate; and
an active region within the semiconductor substrate in between and adjacent to the pair of gate stacks and in electrical connection with the contact plug, said contact plug being situated in between and adjacent to the pair of gate stacks.
4. The memory structure as defined in claim 1, wherein the opposing non-planar surfaces of the free-standing wall has a plurality of indentations and protrusions, wherein each said indentation on one of said opposing non-planar surfaces has a corresponding one of said protrusions on the other of said opposing non-planar surfaces, and wherein each said protrusion on one of said opposing non-planar surfaces has a corresponding one of said indentations on the other of said opposing non-planar surfaces.
5. A memory structure, comprising:
a pair of gate stacks on a semiconductor substrate;
an active region within the semiconductor substrate in between and adjacent to the pair of gate stacks;
a contact plug in electrical contact with the active region, and in between and adjacent to the pair of gate stacks;
a layer of insulating material over the pair of gate stacks and the contact plug;
a recess in the layer of insulating material extending to the contact plug;
a storage node formed from silicon-containing material that is within said recess upon said layer of insulating material and upon said contact plug, wherein said storage node is in contact with said contact plug, said silicon-containing material having an ion concentration that is in a range from about 11015 ions per cm3 of silicon-containing material to about 11022 ions per cm3 of silicon-containing material, wherein said ion concentration presents an ion concentration gradient in said silicon-containing material, said storage node having a base and a free-standing wall extending from said base, said free-standing wall having opposing non-planar surfaces, wherein said free-standing wall has a shape that is partly determined by said ion concentration gradient;
a layer of polysilicon on a surface of the silicon-containing material, the layer of polysilicon comprising at least one of HSG polysilicon and CSG polysilicon;
a dielectric layer upon said storage node; and
an electrically conductive cell plate upon said dielectric layer.
6. The memory structure as defined in claim 5, wherein the opposing non-planar surfaces of said free-standing wall has a thickness therebetween that varies non-linearly.
7. The memory structure as defined in claim 5, wherein the opposing non-planar surfaces of the free-standing wall has a plurality of indentations and protrusions, wherein each said indentation on one of said opposing non-planar surfaces has a corresponding one of said protrusions on the other of said opposing non-planar surfaces, and wherein each said protrusion on one of said opposing non-planar surfaces has a corresponding one of said indentations on the other of said opposing non-planar surfaces.
8. In a circuit that includes a pair of gate stacks on a semiconductor substrate with an active region within the semiconductor substrate in between and adjacent to the pair of gate stacks, and a contact plug in electrical contact with the active region, and in between and adjacent to the pair of gate stacks, a memory structure comprising:
a layer of insulating material over the pair of gate stacks and the contact plug;
a recess in the layer of insulating material extending to the contact plug;
a storage node comprising silicon-containing material within said recess upon said layer of insulating material and upon said contact plug, said silicon-containing material having an ion concentration in a range from about 11015 ions per cm3 of silicon-containing material to about 11022 ions per cm3 of silicon-containing material, wherein said ion concentration presents an ion concentration gradient in said silicon-containing material, said storage node including a base and a free-standing wall extending from said base, wherein said free-standing wall is provided with a shape that is partly determined by said ion concentration gradient;
at least one of HSG polysilicon and CSG polysilicon upon a surface of the storage node, said layer of insulating material being out of contact with said at least one of HSG polysilicon and CSG polysilicon;
a dielectric layer upon said storage node; and
an electrically conductive cell plate upon said dielectric layer.
9. The memory structure as defined in claim 8, wherein the free-standing wall has opposing non-planar surfaces.
10. The memory structure as defined in claim 9, wherein the opposing non-planar surfaces of the free-standing wall has a thickness therebetween that varies non-linearly.
11. The memory structure as defined in claim 9, wherein the opposing non-planar surfaces of the free-standing wall has a plurality of indentations and protrusions, wherein each said indentation on one of said opposing non-planar surfaces having a corresponding one of said protrusions on the other of said opposing non-planar surfaces, and wherein each said protrusion on one of said opposing non-planar surfaces has a corresponding one of said indentations on the other of said opposing non-planar surfaces.
12. A memory structure comprising:
a pair of gate regions on a semiconductor substrate;
an active region within the semiconductor substrate in between and adjacent to the pair of gate stacks;
a contact plug in electrical connection with the active region, the contact plug being situated in between and adjacent to the pair of gate stacks;
a storage node comprising a layer of polysilicon on a surface of silicon-containing material, the layer of polysilicon comprising at least one of HSG polysilicon and CSG polysilicon, the silicon-containing material being in contact with said contact plug and being implanted with ions to a concentration in a range from about 11015 ions per cm3 of silicon-containing material to about 11022 ions per cm3 of silicon-containing material, wherein said ion concentration presents an ion concentration gradient in said silicon-containing material, said storage node comprising:
a base in contact with said contact plug; and
a free-standing wall extending from said base and having opposing nonplanar surfaces, wherein said free-standing wall has a shape that is partly determined by said ion concentration gradient;
a dielectric layer upon said storage node; and
an electrically conductive cell plate upon said dielectric layer.
13. The memory structure as defined in claim 12, wherein each of the opposing nonplanar surfaces of the free-standing wall has a plurality of indentations and protrusions, wherein each said indentation on one of said opposing nonplanar surfaces has a corresponding one of said protrusions on the other of said opposing nonplanar surfaces, and wherein each said protrusion on one of said opposing nonplanar surfaces has a corresponding one of said indentations on the other of said opposing nonplanar surfaces.
14. The memory structure as defined in claim 12, wherein the cross-section taken perpendicularly to the free-standing wall is closed.
15. The memory structure as defined in claim 14, wherein the closed cross-section has a shape selected from the group consisting of a circle, an ellipse, an oval, and an annular shape.