1. A method comprising:
receiving a message to store in a memory block by a computing device, wherein the memory block comprises a plurality of cells and each cell has a value of a plurality of values;
generating a first string from the message by the computing device, wherein the first string comprises a plurality of positions, and wherein each position corresponds to a cell of the plurality of cells and each position has a value of the plurality of values;
determining a value of a stuck cell of the plurality of cells of the memory block by the computing device;
determining a difference between the value of the stuck cell and the value of the position of the first string corresponding to the stuck cell by the computing device;
adding, modulo an alphabet size, the determined difference to each value of the first string to generate a second string by the computing device; and
storing the second string in the memory block by the computing device.
2. The method of claim 1, further comprising:
retrieving the stored second string;
determining the difference based on the second string;
subtracting the determined difference from each value of the second string modulo the alphabet size to recover the first string;
generating the message based on the first string; and
providing the message.
3. The method of claim 2, wherein determining the difference based on the second string comprises determining the value of a predetermined position of the second string, and determining the difference based on the value of the predetermined position.
4. The method of claim 3, wherein the predetermined position is the first position.
5. The method of claim 1, wherein each value of the plurality of values is repeated uniformly in the first string.
6. The method of claim 5, wherein a first position of the first string has a predetermined value.
7. The method of claim 6, wherein the predetermined value is zero.
8. The method of claim 1, wherein the computing device comprises a memory controller.
9. The method of claim 1, wherein each value corresponds to a resistance level.
10. A method comprising:
generating a first string from a message associated with a memory block by a computing device, wherein the memory block comprises a plurality of cells and each cell has a value of a plurality of values, the first string comprises a plurality of positions, and each position corresponds to a cell of the plurality of cells and each position has a value of the plurality of values;
determining a value of a stuck cell of the plurality of cells of the memory block by the computing device;
determining a difference between the value of the stuck cell and the value of the position of the first string corresponding to the stuck cell by the computing device;
adding, modulo an alphabet size, the determined difference to each value of the first string to generate a second string by the computing device; and
storing the second string in the memory block by the computing device.
11. The method of claim 10, further comprising:
retrieving the stored second string;
determining the difference based on the second string;
subtracting the determined difference from each value of the second string modulo the alphabet size to recover the first string;
generating the message based on the first string; and
providing the message.
12. The method of claim 11, wherein determining the difference based on the second string comprises determining the value of a predetermined position of the second string, and determining the difference based on the value of the predetermined position.
13. The method of claim 12, wherein the predetermined position is the first position.
14. The method of claim 10, wherein each value of the plurality of values is repeated uniformly in the first string.
15. The method of claim 14, wherein a first position of the first string has a predetermined value.
16. A system comprising:
a memory controller;
a plurality of memory blocks; and
a mapping engine adapted to:
receive a message to store in a memory block of the plurality of memory blocks, wherein the memory block comprises a plurality of cells and each cell has a value of a plurality of values;
generate a first string from the message, wherein the first string comprises a plurality of positions, and wherein each position corresponds to a cell of the plurality of cells and each position has a value of the plurality of values;
determine a value of a stuck cell of the plurality of cells of the memory block;
determine a difference between the value of the stuck cell and the value of the position of the first string corresponding to the stuck cell;
add, modulo an alphabet size, the determined difference to each value of the first string to generate a second string; and
store the second string in the memory block.
17. The system of claim 16, wherein each value of the plurality of values is repeated uniformly in the first string.
18. The system of claim 17, wherein a first position of the first string has a predetermined value.
19. The system of claim 18, wherein the predetermined value is zero.
20. The system of claim 16, wherein each value corresponds to a resistance level.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A microelectronic component comprising a dielectric substrate having a top surface and a bottom surface and at least one aperture therethrough, said dielectric substrate further having terminals exposed at said top surface, said substrate further having connection sections adjacent a portion of said bottom surface of said substrate and being releasably connected thereto or displaceable therefrom, said connection sections further extending at least partially across said at least one substrate aperture, said connection sections being connected to said terminals by conductive leads.
2. The microelectronic component as claimed in claim 1, wherein said substrate further has an anchor between said conductive leads and said connection sections, said anchor having a greater adherence to said bottom surface of said substrate than said connection section.
3. The microelectronic component as claimed in claim 2, wherein said anchor has a larger surface area per unit length than said connection section in contact with said substrate bottom surface.
4. The microelectronic component as claimed in claim 2, wherein said anchor is a conductive via extending from said bottom surface to the top surface of said substrate.
5. The microelectronic component as claimed in claim 1, further including a layer disposed between said connection section and said substrate bottom surface.
6. The microelectronic component as claimed in claim 5, wherein said layer is a conductive layer.
7. The microelectronic component as claimed in claim 6, wherein said layer is a copper layer.
8. The microelectronic component as claimed in claim 5, wherein said layer is a dielectric layer.
9. The microelectronic component as claimed in claim 8, wherein said layer is an adhesive layer.
10. A microelectronic connection component comprising:
(a) a dielectric substrate having a top surface, a bottom surface and terminals exposed at said top surface;
(b) a plurality of elongated connection sections on said substrate, each said connection section having a first portion overlying said bottom surface of said dielectric substrate and a second portion projecting from said substrate, said second portions of said connection sections being electrically connected to said terminals through said first portions of said connection sections, said first and second portions of said connection sections being displaceable downwardly away from said substrate.
11. A component as claimed in claim 10 wherein said dielectric substrate has one or more apertures extending through said substrate between said top surface and said bottom surface and said second portions of said connection sections project from said dielectric substrate at least partially across said one or more apertures.
12. A connection component as claimed in claim 11 wherein each said connection section has its respective first portion on a first side of one said aperture and has its second portion releasably attached to said substrate on the opposite side of the same aperture.
13. A connection component as claimed in claim 10 wherein said first portions of said connection sections have first ends remote from said second portions of said connection sections, said component further comprising anchors at said first ends of said first portions, said anchors being securely attached to said substrate.
14. A connection component as claimed in claim 13 wherein at least some of said anchors are disposed in alignment with at least some of said terminals.
15. A connection component as claimed in claim 13 further comprising leads extending between at least some of said anchors and at least some of said terminals.
16. A connection component as claimed in claim 10 wherein said terminals are disposed in an array extending over a terminal region of said substrate and wherein at least some of said first portions extend over said bottom surface in said terminal region.
17. A connection component as claimed in claim 16 wherein at least some of said first portions extend beneath at least some of said terminals.