1460952314-e8b4119e-575a-4d3d-9b10-d694eaf7d3c7

1. A chip package structure, comprising:
a chip, comprising an active surface and a back surface opposite to the active surface;
at least one inducting coil, disposed around a periphery region of the chip;
a molding compound, comprising an upper surface and a lower surface opposite to the upper surface, the molding compound covering the chip and the periphery region and exposing the active surface, wherein the inducting coil is disposed on the molding compound and the lower surface of the molding compound is substantially aligned with respect to the active surface; and
a redistribution circuit layer, covering the active surface, a part of the molding compound, and a part of the inducting coil, and electrically connected with the chip.
2. The chip package structure as claimed in claim 1, wherein the chip further comprises a plurality of pads disposed on the active surface, and the redistribution circuit layer electrically connects the inducting coil to one of the pads.
3. The chip package structure as claimed in claim 2, wherein the redistribution circuit layer comprises a patterned conductive layer that connects a part of the inducting coil projected from the lower surface to one of the pads.
4. The chip package structure as claimed in claim 2, wherein the molding compound further comprises a via that exposes a part of the inducting coil, the redistribution circuit layer comprises a patterned conductive layer, and the patterned conductive layer connects the part exposed by the via to one of the pads.
5. The chip package structure as claimed in claim 1, wherein the inducting coil is embedded into the molding compound, and a surface of the inducting coil away from the upper surface is projected from the lower surface.
6. The chip package structure as claimed in claim 1, wherein the inducting coil is embedded into the molding compound, and a surface of the inducting coil away from the lower surface is substantially aligned with respect to the upper surface.
7. The chip package structure as claimed in claim 1, wherein the inducting coil is disposed on the lower surface.
8. The chip package structure as claimed in claim 1, wherein a number of the inducting coil is plural, and the redistribution circuit layer electrically connects each of the inducting coils with the chip.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of preparing a flexible substrate assembly, the method comprising:
providing a carrier substrate;
providing a cross-linking adhesive;
providing a plastic substrate; and
coupling the carrier substrate to the plastic substrate using the cross-linking adhesive.
2. The method of claim 1 wherein:
coupling the carrier substrate to the plastic substrate comprises:
depositing the cross-linking adhesive over a first surface of the carrier substrate;
spinning the carrier substrate and the cross-linking adhesive to distribute the cross-linking adhesive over the first surface of the carrier substrate; and
placing a first surface of the plastic substrate over the first surface of the carrier substrate with the cross-linking adhesive located between the first surface of the plastic substrate and the first surface of the carrier substrate.
3. The method of claim 1 wherein:
coupling the carrier substrate to the plastic substrate comprises depositing the cross-linking adhesive over a first surface of the carrier substrate using at least one of the following techniques: spin-coating, spray-coating, extrusion coating, preform lamination, slot die coating, or screen lamination.
4. The method of claim 1 further comprising:
after coupling the carrier substrate to the plastic substrate, removing the plastic substrate from the carrier substrate.
5. The method of claim 1 further comprising:
after coupling the carrier substrate to the plastic substrate, fabricating one or more electrical components over a surface of the flexible substrate.
6. The method of claim 5, further comprising:
after fabricating the one or more electrical components, removing the plastic substrate from the carrier substrate.
7. The method of claim 1 further comprising at least one of:
thermally curing the cross-linking adhesive after coupling the carrier substrate to the plastic substrate;
curing the cross-linking adhesive with ultraviolet light after coupling the carrier substrate to the plastic substrate;
baking the plastic substrate before coupling the carrier substrate to the plastic substrate; or
baking the cross-linking adhesive before coupling the carrier substrate to the plastic substrate.
8. The method of claim 1 further comprising:
attaching a protective material to at least a first surface of the plastic substrate before coupling the carrier substrate to the plastic substrate, wherein coupling the carrier substrate to the plastic substrate comprises coupling the carrier substrate to a second surface of the plastic substrate using the cross-linking adhesive.
9. The method of claim 8, further comprising:
providing a protective template; and
coupling the protective template to the plastic substrate,
wherein:
the protective material is at least partially located between the protective template and the plastic substrate.
10. The method of claim 9 further comprising:
providing a shield material between the protective template and the protective material.
11. The method of claim 10 further comprising:
laminating the carrier substrate, the cross-linking adhesive, the plastic substrate, the protective template, the protective material, and the shield material.
12. The method of claim 1 wherein at least one of:
providing the carrier substrate comprises providing the carrier substrate with at least a polished first surface;
providing the carrier substrate comprises providing the carrier substrate comprising at least one of the following: alumina, silicon, stainless steel, or sapphire; or
providing the carrier substrate comprises providing the carrier substrate comprising a material that is CTE matched to the plastic substrate.
13. The method of claim 1 wherein at least one of:
providing the plastic substrate comprises providing the plastic substrate comprising of at least one of the following: polyethylene naphthalate, polyethylene terephthalate, polyethersulfone, polyimide, polycarbonate, cyclic olefin copolymer, or liquid crystal polymer;
or
providing the plastic substrate comprises providing the plastic substrate with a elastic modulus of less than approximately five GigaPascals.
14. The method of claim 1 wherein at least one of:
providing the cross-linking adhesive comprises providing a cross-linking acrylic adhesive.;
or
providing the cross-linking adhesive comprises providing a cross-linking adhesive that outgases at a rate of less than 2\xd710\u22124 Ton-liters per second.
15. A flexible substrate assembly comprising:
a carrier substrate with a first surface;
a cross-linking adhesive; and
a plastic substrate having a first surface and a second surface opposite the first surface,
wherein:
the first surface of the carrier substrate is removably bonded to the first surface of the plastic substrate with the cross-linking adhesive.
16. The flexible substrate assembly of claim 15 further comprising:
at least one of the following are located at the second surface of the flexible substrate: one or more thin film transistors, organic light emitting diodes, inorganic light emitting diodes, electrode arrays, field effect transistors, or passive structures.
17. The flexible substrate assembly of claim 15 wherein at least one of:
the cross-linking adhesive comprises a pressure sensitive acrylic cross-linking adhesive that outgases at a rate of less than 2\xd710\u22124 Torr-liters per second;
a thickness of the cross-linking adhesive between the carrier substrate and the plastic substrate is in the range of approximately five micrometers to approximately fifteen micrometers; or
the thickness of the plastic substrate is in the range of approximately 100 micrometers to approximately 200 micrometers.
18. The flexible substrate assembly of claim 15 further comprising:
a protective material over the second surface of the plastic substrate;
a protective template over the protective material; and
a shield material between the protective material and the protective template.
19. A method of fabricating a semiconductor device over a flexible plastic substrate, the method comprising:
providing a flexible plastic substrate having a first surface and a second surface opposite the first surface;
attaching a protective material to the first surface of the flexible plastic substrate;
providing a support substrate with a first surface and a polished second surface opposite the first surface;
providing a cross-linking acrylic adhesive;
spin-coating the cross-linking acrylic adhesive across the first surface of the support substrate;
using the cross-linking acrylic adhesive to removably couple the first surface of the support substrate to the second surface of the flexible plastic substrate; and
laminating the support substrate and the flexible plastic substrate with the cross-linking acrylic adhesive located between the support substrate and the flexible plastic substrate.
20. The method of claim 19 further comprising:
after laminating, removing the protective material from the first surface of the flexible plastic substrate.
21. The method of claim 20 further comprising:
after removing the protective material, forming one or more transistors over the first surface of the flexible plastic substrate.