What is claimed is:
1. An assembly of a semiconductor device attached to a substrate, said assembly comprising:
an inclined support, the inclined support being inclined at angle with respect to the horizontal;
a substrate having a front edge, back edge, first lateral edge, second lateral edge, and a plurality of electrical contact pads located thereon, the substrate being located on the inclined support;
a semiconductor device having a plurality of sides formed by a first side, second side, first lateral edge, second lateral edge, and a plurality of electrical contact pads located thereon;
a plurality of electrical connectors interposed between the electrical contact pads located on the substrate and the electrical contact pads located on the semiconductor device thereby electrically and mechanically interconnecting the semiconductor device to the substrate, the plurality of electrical connectors interconnecting the substrate to the semiconductor device spacing the substrate from the semiconductor device causing a gap to be formed therebetween;
an underfill material substantially filling the gap formed between the substrate and the semiconductor device;
a dam located on the substrate adjacent the second side of the semiconductor device.; and
a vibrator for contacting the inclined support.
2. The assembly of claim 1, further comprising:
a second dam located adjacent one of the lateral sides of the semiconductor device.
3. The assembly of claim 1, wherein the assembly further comprises:
an aperture extending through the substrate at a location adjacent the semiconductor device extending between at least two of the electrical connectors of the plurality of electrical connectors extending between the substrate and the semiconductor device.
4. The assembly of claim 1, wherein the underfill material flows into and through the gap by the substrate being supported on the inclined support with the underfill material thereby flowing downwardly from the first side of the semiconductor device in the direction of the second side.
5. An assembly of a semiconductor device attached to a substrate, said assembly comprising:
a substrate having a front edge, back edge, first lateral edge, second lateral edge, and a plurality of electrical contact pads located thereon, the substrate being located on an inclined support;
a semiconductor device having a plurality of sides formed by a first side, second side, first lateral edge, second lateral edge, and a plurality of electrical contact pads located thereon;
a plurality of electrical connectors interposed between the electrical contact pads located on the substrate and the electrical contact pads located on the semiconductor device thereby electrically and mechanically interconnecting the semiconductor device to the substrate, the plurality of electrical connectors interconnecting the substrate to the semiconductor device thereby spacing the substrate from the semiconductor device causing a gap to be formed therebetween;
an underfill material substantially filling the gap formed between the substrate and the semiconductor device, the underfill substantially uniformly filling the gap by including the force of gravity acting thereon during the underfilling of the gap;
a dam located on the substrate adjacent the second side of the semiconductor device; and
a vibrator for contacting said substrate.
6. The assembly of claim 5, further comprising:
a second dam located adjacent one of the first lateral edge and second lateral edge of the semiconductor device.
7. The assembly of claim 5, wherein the assembly further comprises:
an aperture extending through the substrate at a location adjacent the semiconductor device extending between at least two of the electrical connectors of the plurality of electrical connectors extending between the substrate and the semiconductor device.
8. The assembly of claim 5, wherein the underfill flows into and through the gap by the substrate being supported on an inclined support with the underfill thereby flowing downwardly from the first side of the semiconductor device in the direction of the second side.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for manufacturing a thin film transistor, comprising:
forming a first conductive film over a substrate;
forming an insulating film over the first conductive film;
forming a semiconductor film over the insulating film;
forming an impurity semiconductor film over the semiconductor film;
forming a second conductive film over the impurity semiconductor film;
forming a first resist mask including a recessed portion over the second conductive film and including at least one opening portion;
exposing at least a surface of the first conductive film by performing first etching on the insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film using the first resist mask;
forming a gate electrode layer by performing second etching in which a part of the first conductive film is side-etched;
after forming the gate electrode layer, forming a second resist mask by making the first resist mask to be reduced to expose a part of the second conductive film, which overlaps with the recessed portion of the first resist mask; and
forming a source and drain electrode layer, a source and drain region, and a semiconductor layer by performing third etching on the second conductive film, the impurity semiconductor film, and a part of the semiconductor film using the second resist mask.
2. A method for manufacturing a thin film transistor, comprising:
forming a first conductive film over a substrate;
forming an insulating film over the first conductive film;
forming a semiconductor film over the insulating film;
forming an impurity semiconductor film over the semiconductor film;
forming a second conductive film over the impurity semiconductor film;
forming a first resist mask including a recessed portion over the second conductive film and including at least one opening portion;
exposing at least a surface of the first conductive film by performing first etching on the insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film using the first resist mask;
forming a second resist mask by making the first resist mask to be reduced to expose a part of the second conductive film, which overlaps with the recessed portion of the first resist mask;
after forming the second resist mask, forming a gate electrode layer by performing second etching in which a part of the first conductive film is side-etched; and
forming a source and drain electrode layer, a source and drain region, and a semiconductor layer by performing third etching on the second conductive film, the impurity semiconductor film, and a part of the semiconductor film using the second resist mask.
3. A method for manufacturing a thin film transistor, comprising:
forming a first conductive film over a substrate;
forming an insulating film over the first conductive film;
forming a semiconductor film over the insulating film;
forming an impurity semiconductor film over the semiconductor film;
forming a second conductive film over the impurity semiconductor film;
forming a first resist mask including a recessed portion over the second conductive film and including at least one opening portion;
performing first etching on the first conductive film, the insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film using the first resist mask;
forming a gate electrode layer by performing second etching in which a part of the first conductive film is side-etched;
after forming the gate electrode layer, forming a second resist mask by making the first resist mask to be reduced to expose a part of the second conductive film, which overlaps with the recessed portion of the first resist mask; and
forming a source and drain electrode layer, a source and drain region, and a semiconductor layer by performing third etching on the second conductive film, the impurity semiconductor film, and a part of the semiconductor film using the second resist mask.
4. A method for manufacturing a thin film transistor, comprising:
forming a first conductive film over a substrate;
forming an insulating film over the first conductive film;
forming a semiconductor film over the insulating film;
forming an impurity semiconductor film over the semiconductor film;
forming a second conductive film over the impurity semiconductor film;
forming a first resist mask including a recessed portion over the second conductive film and including at least one opening portion;
performing first etching on the first conductive film, the insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film using the first resist mask;
forming a second resist mask by making the first resist mask to be reduced to expose a part of the second conductive film, which overlaps with the recessed portion of the first resist mask;
after forming the second resist mask, forming a gate electrode layer by performing second etching in which a part of the first conductive film is side-etched; and
forming a source and drain electrode layer, a source and drain region, and a semiconductor layer by performing third etching on the second conductive film, the impurity semiconductor film, and a part of the semiconductor film using the second resist mask.
5. The method for manufacturing a thin film transistor according to any one of claims 1 to 4,
wherein the first resist mask is formed using a multi-tone mask.
6. The method for manufacturing a thin film transistor according to any one of claims 1 to 4,
wherein an element region is formed by the first etching, and
wherein a side surface of the gate electrode layer is provided more on the inside than a side surface of the element region by a roughly uniform distance by the second etching.
7. The method for manufacturing a thin film transistor according to any one of claims 1 to 4,
wherein the first etching is dry etching, and
wherein the second etching is wet etching.
8. The method for manufacturing a thin film transistor according to any one of claims 1 to 4,
wherein the at least one opening portion is provided over a region where there is a wiring which is formed by processing the second conductive film at an intersection of a wiring which is formed by processing the first conductive film and the wiring that is formed by processing the second conductive film with the wiring that is formed by processing the first conductive film sandwiched.
9. The method for manufacturing a thin film transistor according to any one of claims 1 to 4,
wherein the thin film transistor is incorporated in one selected from the group consisting of a television, a computer and a phone.
10. A method for manufacturing a display device, comprising:
forming a first conductive film over a substrate;
forming a first insulating film over the first conductive film;
forming a semiconductor film over the first insulating film;
forming an impurity semiconductor film over the semiconductor film;
forming a second conductive film over the impurity semiconductor film;
forming a first resist mask including a recessed portion over the second conductive film and including at least one opening portion;
exposing at least a surface of the first conductive film by performing first etching on the first insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film using the first resist mask;
forming a gate electrode layer by performing second etching in which a part of the first conductive film is side-etched;
after forming the gate electrode layer, forming a second resist mask by making the first resist mask to be reduced to expose a part of the second conductive film, which overlaps with the recessed portion of the first resist mask;
forming a source and drain electrode layer, a source and drain region, and a semiconductor layer by performing third etching on the second conductive film, the impurity semiconductor film, and a part of the semiconductor film using the second resist mask, thereby forming a thin film transistor;
removing the second resist mask and forming a second insulating film which covers the thin film transistor;
forming an opening portion in the second insulating film so as to expose a part of the source and drain electrode layer; and
forming a pixel electrode in the opening portion formed in the second insulating film and over the second insulating film selectively.
11. A method for manufacturing a display device, comprising:
forming a first conductive film over a substrate;
forming a first insulating film over the first conductive film;
forming a semiconductor film over the first insulating film;
forming an impurity semiconductor film over the semiconductor film;
forming a second conductive film over the impurity semiconductor film;
forming a first resist mask including a recessed portion over the second conductive film and including at least one opening portion;
exposing at least a surface of the first conductive film by performing first etching on the first insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film using the first resist mask;
forming a second resist mask by making the first resist mask to be reduced to expose a part of the second conductive film, which overlaps with the recessed portion of the first resist mask;
after forming the second resist mask, forming a gate electrode layer by performing second etching in which a part of the first conductive film is side-etched;
forming a source and drain electrode layer, a source and drain region, and a semiconductor layer by performing third etching on the second conductive film, the impurity semiconductor film, and a part of the semiconductor film using the second resist mask, thereby forming a thin film transistor;
removing the second resist mask and forming a second insulating film which covers the thin film transistor;
forming an opening portion in the second insulating film so as to expose a part of the source and drain electrode layer; and
forming a pixel electrode in the opening portion formed in the second insulating film and over the second insulating film selectively.
12. The method for manufacturing a display device according to any one of claims 10 and 11,
wherein the first resist mask is formed using a multi-tone mask.
13. The method for manufacturing a display device according to any one of claims 10 and 11,
wherein an element region is formed by the first etching, and
wherein a side surface of the gate electrode layer is provided more on the inside than a side surface of the element region by a roughly uniform distance by the second etching.
14. The method for manufacturing a display device according to any one of claims 10 and 11,
wherein the first etching is dry etching, and
wherein the second etching is wet etching.
15. The method for manufacturing a display device according to any one of claims 10 and 11,
wherein the second insulating film is formed by stacking an insulating film formed by a CVD method or a sputtering method, and an insulating film formed by a spin coating method.
16. The method for manufacturing a display device according to any one of claims 10 and 11,
wherein the at least one opening portion formed in the first resist mask is provided over a region where there is a wiring which is formed by processing the second conductive film at an intersection of a wiring which is formed by processing the first conductive film and the wiring that is formed by processing the second conductive film with the wiring that is formed by processing the first conductive film sandwiched.
17. The method for manufacturing a display device according to any one of claims 10 and 11,
wherein the display device is incorporated in one selected from the group consisting of a television, a computer and a phone.