1. A resonance type of longitudinal double-mode SAW filter including a piezoelectric plate, comprising:
a first interdigital transducer that generates surface acoustic waves;
a second interdigital transducer that receives the surface acoustic waves that are generated by said first interdigital transducer;
a third interdigital transducer that is disposed between said first interdigital transducer and said second interdigital transducer that controls an amplitude of the surface acoustic waves that are generated; and
a pair of reflectors on disposed both sides of said first, second and third interdigital transducers in a direction in which said surface acoustic waves propagate (longitudinal direction X),
said reflectors and said first, second and third interdigital transducers being formed by periodically arranging metallic parallel conductors on said piezoelectric plate,
and a distance between a closest parallel conductor among said reflectors and said first and second interdigital transducers, being equal to a space or (one periodic length+space) between a line and the space possessed by one period of the interdigital transducers,
and an intersecting conductor 1 and an intersecting conductor 2 connected to a grounding potential side being arranged between said first interdigital transducer and said third interdigital transducer, and between said second interdigital transducer and said third interdigital transducer,
and wherein, if the wavelength of the surface acoustic waves is defined by \u03bb and n is an integer of 0, 1, 2, – – – , then, total lengths D1 and D2 of widths of the intersecting conductors and of space widths on both sides thereof are so determined by n which is in the range of from 1 to 10, that n(\u03bb2)+(\xbc)\u03bb or n(\u03bb2)+(\xbe)\u03bb is achieved,
and the lengths PT1, PT2=PT1 of periodically arranging parallel conductors of said first and said second interdigital transducers, the length PTG of periodically arranging said third interdigital transducers, and the length PR of periodically arranging the reflectors, being so set as to satisfy relationships PT1, PT2=<PR, PTGPT1=PTGPT2=PTNG, and
nearly all of higher-order natural mode oscillation displacements A0, S1 and A1 being made present in said first and second interdigital transducer regions, an electrode finger phase weighting is formed to correspond to a BPSK sign with which a phase sign changes into 0 or \u03c0 at a polarity-changing point on an electrode charge distribution function Q(x) that generates on the electrode due to natural modes of oscillation thereby to select a single pair of natural modes existing stationary in a direction X of propagation of the surface acoustic waves that are utilized, to generate a symmetrical charge distribution state (Q(x), \u2212Q(x)) and an obliquely symmetrical charge distribution state (Q(x), Q(x)) to correspond to the regions of said first and said second interdigital transducers, and said PTNG in the region of said third interdigital transducer to be controlled is set to a range of 1.02 to 1.04 so as to couple the two together.
2. The longitudinal double-mode SAW filter according to claim 1,
said piezoelectric plate being fabricated with STW cut which utilizes the surface acoustic waves that propagate in the direction of Z\u2032-axis in a quartz Y-cut flat plate that is turned about an electric axis by 35 degrees to 42 degrees counterclockwise, and
the ratio H\u03bb between the film thickness H of the aluminum electrode and the wavelength \u03bb of the surface acoustic waves is 0.03 to 0.05, and
the sum M of electrode fingers forming the pairs of the interdigital transducers is 90 pairs to 150 pairs, and an intersection width of the electrode fingers corresponding to the sum M is in a range of 90 to 70 wavelengths.
3. The longitudinal double-mode SAW filter according to claim 1, reflection coefficient \u03b3 of the surface acoustic waves per an electrode finger of said first and second interdigital transducers being in a range of from 0.06 to 0.16.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of testing an electrical switchgear system, comprising:
applying an analog signal to a node in said electrical switchgear system,
wherein said node monitors a power line signal and controls a breaker based on said power line signal, and wherein said analog signal simulates said power line signal; and
receiving data representing a status of said breaker.
2. The method of claim 1, where in said data is received from at least one of said node or said breaker.
3. The method of claim 1, wherein said analog signal has a magnitude of less than about 10 volts peak-to-peak.
4. The method of claim 1, wherein said analog signal has a magnitude of about 2.5 volts peak-to-peak.
5. The method of claim 1, wherein said analog signal has a magnitude of less than or equal to about 10% of a magnitude of said power line signal.
6. The method of claim 1, wherein said applying said analog signal is performed while said node monitors said power line signal.
7. The method of claim 1, wherein said analog signal simulates a fault condition of said power line signal.
8. The method of claim 1, wherein said analog signal simulates a non-fault condition of said power line signal.
9. The method of claim 1, further comprising: modifying said analog signal based on said status of said breaker; and receiving additional data representing said status of said breaker.
10. The method of claim 1,
wherein said analog signal is a first analog signal, said node is a first node, said breaker is a first breaker, and said power line signal is a first power line signal,
wherein said method further comprises applying, simultaneously with said applying said first analog signal, a second analog signal to a second node in said electrical switchgear system,
wherein said second node monitors a second power line signal and controls a second breaker based on said second power line signal, and
wherein said second analog signal simulates said second power line signal.
11. The method of claim 1, further comprising measuring a time required for the said breaker to trip based on timestamps of said data.
12. A method of testing an electrical switchgear system, comprising:
applying a first analog signal to a first node in said electrical switchgear system, wherein said first node monitors a first power line signal and controls a first breaker based on said first power line signal, and wherein said first analog signal simulates said first power line signal;
applying, simultaneously with said applying said first analog signal, a second analog signal to a second node in said electrical switchgear system, wherein said second node monitors a second power line signal and controls a second breaker based on said second power line signal, and wherein said second analog signal simulates said second power line signal; and
receiving data from said first node representing a status of said first breaker,
wherein said first analog signal has a magnitude of less than or equal to about 10% of a magnitude of said first power line signal.
13. A arrangement for testing an electrical switchgear system, comprising:
a generator for applying an analog signal to a node in said electrical switchgear system, wherein said node monitors a power line signal and controls a breaker based on said power line signal, and wherein said analog signal simulates said power line signal; and
an interface for receiving data representing a status of said breaker.
14. The arrangement of claim 13, wherein said interface receives said data from at least one of said node or said breaker.
15. The arrangement of claim 13, wherein said analog signal has a magnitude of less than about 10 volts peak-to-peak.
16. The arrangement of claim 13, wherein said analog signal has a magnitude of about 2.5 volts peak-to-peak.
17. The arrangement of claim 13, wherein said analog signal has a magnitude of less than or equal to about 10% of a magnitude of said power line signal.
18. The arrangement of claim 13, wherein said generator applies said analog signal while said node monitors said power line signal.
19. The arrangement of claim 13, wherein said analog signal simulates a fault condition of said power line signal.
20. The arrangement of claim 13, wherein said analog signal simulates a non-fault condition of said power line signal.
21. The arrangement of claim 13, wherein said arrangement:
modifies said analog signal based on said status of said breaker; and
receives additional data representing said status of said breaker.
22. The arrangement of claim 13,
wherein said analog signal is a first analog signal, said node is a first node, said breaker is a first breaker, and said power line signal is a first power line signal,
wherein said generator is also for applying, simultaneously with said applying said first analog signal, a second analog signal to a second node in said electrical switchgear system,
wherein said second node monitors a second power line signal and controls a second breaker based on said second power line signal, and
wherein said second analog signal simulates said second power line signal.
23. The arrangement of claim 13, further comprising a processor for measuring a time required for the said breaker to trip based on timestamps of said data.
24. A arrangement for testing an electrical switchgear system, comprising:
a generator for applying a first analog signal to a first node in said electrical switchgear system, wherein said first node monitors a first power line signal and controls a first breaker based on said first power line signal, and wherein said first analog signal simulates said first power line signal;
a generator for applying, simultaneously with said applying said first analog signal, a second analog signal to a second node in said electrical switchgear system, wherein said second node monitors a second power line signal and controls a second breaker based on said second power line signal, and wherein said second analog signal simulates said second power line signal; and
an interface for receiving data from said first node representing a status of said first breaker,
wherein said first analog signal has a magnitude of less than or equal to about 10% of a magnitude of said first power line signal.
25. A storage medium comprising instructions for controlling a processor for testing an electrical switchgear system to:
apply an analog signal to a node in said electrical switchgear system, wherein said node monitors a power line signal and controls a breaker based on said power line signal, and wherein said analog signal simulates said power line signal; and
receive data representing a status of said breaker.
26. A storage medium comprising instructions for controlling a processor for testing an electrical switchgear system to:
apply a first analog signal to a first node in said electrical switchgear system, wherein said first node monitors a first power line signal and controls a first breaker based on said first power line signal, and wherein said first analog signal simulates said first power line signal;
apply, simultaneously with said applying said first analog signal, a second analog signal to a second node in said electrical switchgear system, wherein said second node monitors a second power line signal and controls a second breaker based on said second power line signal, and wherein said second analog signal simulates said second power line signal; and
receive data from said first node representing a status of said first breaker, wherein said first analog signal has a magnitude of less than or equal to about 10% of a magnitude of said first power line signal.