1. A tuning circuit comprising a series resonance circuit, a driving circuit connected to a terminal of the series resonance circuit and a negative resistance circuit connected to other terminal thereof;
said negative resistance circuit including a collector-emitter dividing type amplifying circuit constituted by a first transistor, an emitter earth type amplifying circuit constituted by a second transistor and connected to the collector-emitter dividing type amplifying circuit, a positive feedback circuit for positively feeding back an output of the emitter earth type amplifying circuit to the collector-emitter dividing type amplifying circuit and a negative feedback circuit for negatively feeding back an output of the emitter earth type amplifying circuit to the collector-emitter dividing type amplifying circuit, the other terminal of the series resonance circuit being connected to an input of the collector-emitter dividing type amplifying circuit and an output of the emitter earth type amplifying circuit being taken out as an output of the negative resistance circuit.
2. A tuning circuit according to claim 1 wherein said first transistor is a npn or pnp transistor and said second transistor is a pnp or npn transistor.
3. A tuning circuit comprising a series resonance circuit, a driving circuit connected to a terminal of the series resonance circuit and a negative resistance circuit connected to other terminal thereof;
said negative resistance circuit including a collector-emitter dividing type amplifying circuit constituted by a first transistor, an emitter earth type amplifying circuit constituted by a second transistor and connected to the collector-emitter dividing type amplifying circuit, an emitter follower circuit constituted by a third transistor and connected to the emitter earth type amplifying circuit, a positive feedback circuit for positively feeding back an output of the emitter follower circuit to the collector-emitter dividing type amplifying circuit and a negative feedback circuit for negatively feeding back the output of the emitter follower circuit to the collector-emitter dividing type amplifying circuit, the other terminal of the series resonance circuit being connected to an input of the collector-emitter dividing type amplifying circuit and an output of the emitter follower circuit being taken out as an output of the negative resistance circuit.
4. A tuning circuit comprising a series resonance circuit, a driving circuit connected to a terminal of the series resonance circuit and a negative resistance circuit connected to other terminal thereof;
said negative resistance circuit including a drain-source dividing type amplifying circuit constituted by a first field effect transistor, a source earth type amplifying circuit constituted by a second field effect transistor and connected to the drain-source dividing type amplifying circuit, a positive feedback circuit for positively feeding back an output of the source earth type amplifying circuit to the drain-source dividing type amplifying circuit and a negative feedback circuit for negatively feeding back the output of the source earth type amplifying circuit to the drain-source dividing type amplifying circuit, the other terminal of the series resonance circuit being connected to an input of the source earth type amplifying circuit and an output of the source earth type amplifying circuit being taken out as an output of the negative resistance circuit.
5. A tuning circuit according to claim 4 wherein the first field effect transistor is a n or p channel type field effect transistor and the second field effect transistor is a p or n channel type field effect transistor.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor module, comprising:
a semiconductor device formed on a semiconductor substrate; and
a device mounting board which mounts said semiconductor device thereon via an insulating layer,
wherein a device electrode in said semiconductor device is formed by a plurality of metallic layers,
among the plurality of metallic layers, the depth of surface roughness of a metallic layer disposed farthest from the semiconductor substrate is larger than that of the other metallic layers thereamong, and
the insulating layer is in contact with a rugged shape of the device electrode.
2. A semiconductor module according to claim 1, said device mounting board including:
the insulating layer;
a wiring layer provided on one main surface of the insulating layer; and
a bump electrode which is electrically connected to the wiring layer and protruded from the wiring layer in an opposite side of the insulating layer,
wherein the bump electrode and the device electrode of said semiconductor device are electrically connected to each other, and
the insulating layer is in contact with the rugged shape of the device electrode.
3. A semiconductor module according to claim 1, wherein the device electrode includes a NiAu layer.
4. A semiconductor module according to claim 2, wherein the device electrode includes a NiAu layer.
5. A semiconductor module according to claim 2, wherein the wiring layer and the bump electrode are formed integrally with each other.
6. A semiconductor module according to claim 3, wherein the wiring layer and the bump electrode are formed integrally with each other.
7. A semiconductor module according to claim 4, wherein the wiring layer and the bump electrode are formed integrally with each other.
8. A semiconductor module according to claim 2, wherein a NiAu layer is provided on a top surface of the bump electrode.
9. A semiconductor module according to claim 3, wherein a NiAu layer is provided on a top surface of the bump electrode.
10. A semiconductor module according to claim 4, wherein a NiAu layer is provided on a top surface of the bump electrode.
11. A method for manufacturing a semiconductor module, the method comprising:
preparing a semiconductor device wherein a device electrode formed on a semiconductor substrate is formed by a plurality of metallic layers and, among the plurality of metallic layers, the depth of roughness of surface of a metallic layer disposed farthest from the semiconductor substrate is larger than that of the other metallic layers thereamong;
preparing a metallic sheet where a plurality of bump electrodes are provided in a protruding manner;
placing the metallic sheet on one main surface of an insulating resin layer in such a manner that the bump electrodes face the insulating resin layer, and exposing the bump electrodes from the other main surface of the insulating resin layer by having the bump electrodes penetrating the insulating resin layer;
placing the semiconductor device, provided with the device electrodes, on the other main surface of the insulating resin layer, and electrically connecting the bump electrodes to the device electrodes corresponding thereto; and
forming a wiring layer by selectively removing the metallic sheet.
12. A method for manufacturing a semiconductor module, the method comprising:
preparing a semiconductor device wherein a device electrode formed on a semiconductor substrate is formed by a plurality of metallic layers and, among the plurality of metallic layers, the depth of roughness of surface of a metallic layer disposed farthest from the semiconductor substrate is larger than that of the other metallic layers thereamong;
preparing a device mounting board having an electrode formed on one main face thereof;
electrically connecting the device electrode to the electrode; and
forming an insulating resin layer in between the semiconductor device and the device mounting board.