1460955898-2ed80631-d95c-4184-89cc-506d95f145ff

1. A holding device (1) for a rotatable mold center part (2) in an injection molding machine having a plate (17) which is rotatable about an axis of rotation (16) and driven by a motor (20), the plate (17) serving to hold the rotatable mold center part (2), the holding device (1) comprising:
a lower cross member (10) which is mounted movably in the longitudinal direction (x) while supported via first bearing blocks (8) and guide rails (7) on a machine bed (6) of the injection molding machine, wherein second bearing blocks (23) support the lower cross member (10) in the circumferential direction relative to tie bars (5) of the injection molding machine.
2. The holding device (1) according to claim 1, wherein the second bearing blocks (23) are floatingly mounted in the vertical direction (26, 27) relative to the lower cross member (10).
3. The holding device (1) according to claim 1, wherein the second bearing blocks (23) are adjustably arranged relative to the lower cross member (10).
4. The holding device (1) according to claim 1, wherein the second bearing blocks (23) at least partially engage around the tie bars (5) from an inside outwards.
5. The holding device (1) according to claim 1, wherein the second bearing blocks (23) are arranged in pairs on a tie bar (5).
6. The holding device (1) according to claim 5, wherein the second bearing blocks (23) are arranged along the tie bar (5) at a distance (a) from one another.
7. The holding device (1) according to claim 1, wherein the second bearing blocks (23) are arranged diagonally to one another relative to an axis of rotation (16).
8. The holding device (1) according to claim 1, wherein at least one second bearing block (23) is operatively connected with the cross member (10) via an adapter (22).
9. The holding device (1) according to claim 1, wherein the cross member (10) is formed in multiple parts.
10. The holding device (1) according to claim 1, wherein the cross member (10) includes a base plate and that the second bearing blocks (23) are arranged on top of andor laterally on the base plate.
11. The holding device (1) according to claim 1, wherein at least one second bearing block (23) is releasably operatively connected with the cross member (10).
12. The holding device (1) according to claim 1, wherein the holding device (1) comprises an upper holding device (4), mounting the rotatable center part (2) relative to the upper two tie bars (5) of the injection molding machine.
13. An injection molding device with a holding device according to claim 1.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of modeling yield for semiconductor products, the method comprising:
determining expected faults for each of a plurality of library elements by running a critical area analysis on each of said library elements;
assessing, from said critical area analysis, an expected number of faults per unit area, and comparing the same to actual observed faults on previously manufactured semiconductor products, and thereafter updating said expected number of faults for each library element in response to observed yield;
establishing a database, said database including the die size and expected faults for each of said library elements;
estimating integrated circuit product die size;
selecting library elements to be used to create an integrated circuit die;
obtaining fault and size data for each of the selected library elements;
summing the adjusted estimated faults for each of said library elements; and
calculating estimated yield;
wherein the expected total number of faults for an integrated circuit die having N different library element types is determined by the expression:
\u03bb
\u2061

(
t
)
=
\u2211

i
=
1

N

\u2062
\u2062
n
i

\u2062

r
i

\u2062

\u03bb
i

\u2062

\u03c4
i

\u2062

F
\u2061

(
t
)
;
wherein
t=time for which yield estimate is needed;
\u03bb(t)=total number of faults per chip at time t;
ni=total number of library elements of type i present on the integrated circuit die;
ri=redundancy factor for library element i;
\u03bbi=estimated number of faults for the ith library element;
ti \u03c4adjustment factor for the ith library element, determined by comparing the yield data for that library element with the estimate value \u03bbi; and
F(t)=learning factor at time t.
2. The method of claim 1, wherein updating said expected faults for each library element in response to observed yield farther comprises:
identifying yield loss associated with individual library elements;
modifying faults for said library element in said database; and
using revised fault entry for subsequent product yield estimates.
3. A method of modeling yield for semiconductor products, the method comprising;
determining expected faults for each of a plurality of library elements by running a critical area analysis on each of said library elements;
assessing, from said critical area analysis, an expected number of faults per unit area, and comparing the actual observed faults on previously manufactured semiconductor products, and thereafter updating said expected number of faults for each library element in response to observed yield;
establishing a database, said database including the die size and expected faults for each of said library elements;
estimating integrated circuit product die size;
selecting library elements to be used to create an integrated circuit die;
obtaining fault and size data for each of the selected library elements;
summing the adjusted estimated faults for each of said library elements; and
calculating estimated yield, wherein the calculated yield is determined by the expression;
Y
\u2061

(
t
)
=
Y
C

\u2061

(
t
)
\xb7
Y

0
\u2062
i
\u2061

(
t
)
\u2062

1
(

1
+
\u03bb
\u2061

(
t
)
a
i
)
a
i
;
wherein
\u03a5(t)=wafer test yield for the integrated circuit die;
\u03a50i(t)=gross systematic test yield for technology i;
\u03a5c(t)=chip custom circuit-limited yield (CLY) factor;
\u03bb(t)=total average number of faults per chip; and
\u03b1i=cluster factor.
4. The method of claim 3, wherein the wafer test yield for each library element is determined by accessing predicted fault information for each library element, the predicted fault information stored in a database.