1. A digital logic apparatus, comprising:
a functional logic block;
a gated clock generator coupled to said functional logic block and having an input for receiving an advance signal, said gated clock generator configured for clocking said functional logic block in accordance with said advance signal; and
a trace logic block coupled to said functional logic block for obtaining trace information from said functional logic block, said trace logic block coupled to said gated clock generator for providing said advance signal to said gated clock generator;
wherein said gated clock generator is responsive to activation of said advance signal by said trace logic block for issuing a clock signal to said functional logic block, wherein said functional logic block is responsive to said clock signal for performing a corresponding functional logic operation, and wherein said trace information is associated with said functional logic operation.
2. The apparatus of claim 1, wherein said clock signal consists of a single clock pulse.
3. The apparatus of claim 1, wherein said trace information is indicative of a state change in said functional logic block that corresponds to said clock signal.
4. The apparatus of claim 1, wherein said trace logic block is configured to receive said trace information and thereafter reactivate said advance signal, wherein said gated clock generator is responsive to said reactivation of said advance signal for issuing a further clock signal to said functional logic block, wherein said functional logic block is responsive to said further clock signal for performing a corresponding further functional logic operation, and wherein said trace logic block receives from said functional logic block further trace information associated with said further functional logic operation.
5. The apparatus of claim 4, wherein said trace logic block processes said trace information and said further trace information, and wherein an amount of time between said activation and said reactivation of said advance signal depends on an amount of time used by said trace logic block to process said trace information.
6. The apparatus of claim 4, wherein said trace logic block includes an input for permitting a source external to said apparatus to delay said reactivation of said advance signal until a time determined by the source.
7. The apparatus of claim 5, wherein one of said clock signals consists of a single clock pulse.
8. The apparatus of claim 5, wherein each of said clock signals consists of a single clock pulse.
9. The apparatus of claim 1, wherein said trace logic block is clocked by a free-running clock.
10. The apparatus of claim 1, wherein said functional logic block is operable to assume a self simulation state.
11. A trace control method, comprising:
performing a trace operation with respect to a functional logic block that is driven by a clock signal that can be selectively activated;
activating the clock signal based on said trace operation; and
obtaining from the functional logic block trace information associated with a functional logic operation performed by the functional logic block, wherein said functional logic operation corresponds to said activation of the clock signal.
12. The method of claim 11, wherein said activating includes activating the clock signal to produce only a single clock pulse.
13. The method of claim 11, wherein said trace information is indicative of a state change in said functional logic block that results from said activating.
14. The method of claim 11, including, after said obtaining, reactivating the clock signal, and obtaining from the functional logic block further trace information associated with a further functional logic operation performed by the functional logic block, wherein said further functional logic operation corresponds to said reactivation of the clock signal.
15. The method of claim 14, including processing said trace information, and wherein an amount of time between said activating and said reactivating depends on an amount of time consumed by said processing.
16. The method of claim 14, including receiving a stall signal, and delaying performance of said reactivating until a time determined by a change in said stall signal.
17. The method of claim 15, wherein one of said activating and said reactivating includes activating the clock signal to produce only a single clock pulse.
18. The method of claim 15, wherein each of said activating and said reactivating includes activating the clock signal to produce only a single clock pulse.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A process for purifying a low molecular weight hydridosilane solution, comprising:
subjecting a solution to be purified, comprising
a. at least one low molecular weight hydridosilane,
b. at least one solvent, and
c. at least one impurity selected from the group consisting of a compound having at least 20 silicon atoms and a homogeneous catalyst system,
to a crossflow membrane process with at least one membrane separation employing a permeation membrane.
2. The process of claim 1, wherein the permeation membrane is an ultrafiltration membrane, a nanofiltration membrane or a reverse osmosis membrane.
3. The process of claim 1, wherein the solution to be purified comprises
a. at least one impurity selected from the group consisting of compounds having at least 20 silicon atoms, and
b. at least one impurity from a homogeneous catalyst system.
4. The process of claim 1, wherein the crossflow membrane process comprises at least a first and a second membrane separation.
5. The process of claim 1, wherein the at least one impurity is
a. at least one hydrosilane or polysilyne
b. with a molar mass of more than 600 gmol.
6. The process of claim 1, wherein the at least one impurity is a homogeneous catalyst system which comprises a metal selected from group 4, 5, 6, 7, 8, 9, or 10 of the Periodic Table.
7. The process of claim 1, wherein the at least one impurity is a homogeneous catalyst system which comprises a ligand selected from the group consisting of halogen, hydrogen, alkyl, aryl, alkylsilane, arylsilane, olefin, alkylcarboxyl, arylcarboxyl, acetylacetonatoalkoxyl, aryloxy, alkylthio, arylthio, substituted cyclopentadienyl, unsubstituted cyclopentadienyl, cyanoalkane, an aromatic cyano compound, CN, CO, NO, alkylamine, arylamine, pyridine, alkylphosphine, arylphosphine, alkylarylphosphine, alkyl phosphite, aryl phosphite, alkyl stibane, aryl stibane, alkyl aryl stibane, alkyl arsane, aryl arsane, and alkyl aryl arsane.
8. The process of claim 1, wherein the at least one solvent of the solution to be purified is selected from the group consisting of an aprotic nonpolar solvent and an aprotic polar solvent.
9. The process of claim 8, wherein the solvent is toluene, n-hexane, or tetradecane.
10. The process of claim 1, wherein the membrane for the at least one membrane separation of the crossflow membrane process is at least one membrane selected from the group consisting of
a. a membrane comprising, as the separation-active layer, a polymer layer of polydimethylsiloxane (PDMS) or at least one other polysiloxanes, polyimide (PI), polyamideimide (PAI), acrylonitrileglycidyl methacrylate (PANGMA), polyamide (PA), polyethersulphone (PES), polysulphone (PSU), cellulose acetate (CA), polyetherimide (PEI), polyvinylidene fluoride (PVDF), polyacrylonitrile (PAN), polyetheretherketone (PEEK), polycarbonate (PC), polybenzimidazole (PBI), at least one polyacrylate, polyetheramide (PIA), polyethylene oxide amide (PEBAX), polyisobutylene (PIB), polyphenylene oxide (PPO), polyvinyl alcohol (PVA), at least one sulphonated polyetheretherketone, (SPEEK) or cellulose,
b. a membrane comprising a separation-active layer of at least one polymer with intrinsic microporosity (PIM), and
c. a hydrophobized ceramic membrane.
11. The process of claim 1, wherein the membrane for the at least one membrane separation of the crossflow membrane process is at least one membrane module selected from the group consisting of
a. an open-channel cushion module system in which the membranes are welded thermally to form membrane pockets, and
b. a wound module in which the membranes are adhesive bonded to form membrane pockets and are wound around a permeate collecting tube with feed spacers.
12. The process of claim 1, wherein the membrane for the at least one membrane separation of the crossflow membrane process is permeable to molecules up to a molar mass of 400 gmol.
13. The process of claim 1, wherein the at least one membrane separation of the crossflow membrane process is performed at a transmembrane pressure difference of \u22670.5 MPa.
14. The process of claim 1, wherein the at least one membrane separation of the crossflow membrane process is performed at a temperature of 10-120\xb0C.
15. The process of claim 1, wherein the at least one membrane separation of the crossflow membrane process is performed at overflow velocities at the membrane of 0.1 to 15 ms.
16. The process of claim 1, wherein the low molecular weight hydridosilane solution to be purified is obtained by a process for synthesizing at least one linear hydridosilane of formula H\u2014(SiH2)n\u2014H, where n\u22672,
wherein at least one hydridosilane, hydrogen, and at least one transition metal compound comprising at least one element of group 8, 9, or 10 of the Periodic Table (Fe, Co, Ni, Ru, Rh, Pd, Re, Os, Ir, Pt) and of the lanthanoids (Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu) are reacted at a pressure of more than 5 bar absolute.
17. The process of claim 1, integrated into a process for preparing the at least one low molecular weight hydridosilane in such a way that a catalyst-comprising retentate stream originating from a membrane separation downstream of a synthesis reactor is fed back to the reactor for recycling.
18. The process of claim 17, wherein the permeate stream originating from the membrane separation is discharged.
19. The process of claim 1, wherein the permeation membrane is an organophilic nanofiltration membrane.
20. The process of claim 1, wherein the crossflow membrane process comprises at least a first, second, and third membrane separation.