1. An assembly structure of electronic device comprising:
a first case having at least one first combining portion;
a second case having at least one second combining portion;
at least one assembly element having a plurality of positioning portions and a locking portion, wherein the positioning portions combine with the second case to position the assembly elements on the second case; and
at least one locking element passing through the first combining portion and the second combining portion and fixed in the locking portion.
2. The assembly structure of electronic device according to claim 1, wherein the first combining portion and the second combining portion have corresponding threaded holes, respectively, and the locking portion has a corresponding assembling hole.
3. The assembly structure of electronic device according to claim 1, wherein the second case has an outer surface and an indentation portion formed at the outer surface; the first case has a contact edge and a protrusion portion protruding from the contact edge and received in the indentation portion.
4. The assembly structure of electronic device according to claim 1, wherein the second case has at least one mount engaging with the positioning portions of the assembly element; and a bottom surface of each positioning portion abuts against an edge of the second case.
5. The assembly structure of electronic device according to claim 4, wherein the mount has at least two first combining structures formed in two side edges; each positioning portion of the assembly element has a second combining structure; and the first combining structures engage with the second combining structures.
6. The assembly structure of electronic device according to claim 5, wherein the first combining structures are recesses, and the second combining structures are ribs that capable of engaging the first combining structures.
7. The assembly structure of electronic device according to claim 2, wherein each of the assembly elements comprises:
a body having the positioning portions; and
a nut embedded in the body’to form the locking portion, wherein the assembling hole is formed in the nut
8. The assembly structure of electronic device according to claim 1, wherein the assembly element further has a locating portion engaging with the second case to improve the combination stability of the assembly element on the second case.
9. The assembly structure of electronic device according to claim 8, wherein the locating portion has a first locating structure; and the second case have at least one second locating structure that capable of engaging the first locating structure of the locating portion.
10. The assembly structure of electronic device according to claim 9, wherein the first locating structure is recess, and the second locating structure is rib that capable of engaging the first locating structure.
11. The assembly structure of electronic device according to claim 1, wherein the second case has an inner surface and at least one support block protruding from the inner surface and supporting the assembly element.
12. The assembly structure of electronic device according to claim 1, wherein the locking elements are screws.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A system comprising:
a variable frequency oscillator configured to generate a clock signal to clock a sequential logic block; and
a pre-heating controller configured to reduce a frequency of the clock signal if a temperature associated with the sequential logic block is determined to be below a particular temperature.
2. The system of claim 1, wherein the sequential logic block comprises a first device that has an operating speed that decreases with decreasing temperature of the first device.
3. The system of claim 2, wherein the sequential logic block comprises a storage element configured to store a logic value produced at least in part by the first device.
4. The system of claim 2, wherein the first device is configured to form an inversion layer at a first threshold voltage and is implemented on an integrated circuit with a second device, the second device configured to form an inversion layer at a second threshold voltage that is less than the first threshold voltage.
5. The system of claim 4, wherein the first device and the second device are transistors.
6. The system of claim 1, further comprising:
a temperature sensor configured to sense the temperature associated with the sequential logic block.
7. The system of claim 1, wherein the pre-heating controller is configured to determine whether the temperature associated with the sequential logic block is below or above the particular temperature based on a number of clock cycles of the clock signal that have elapsed.
8. The system of claim 1, wherein the pre-heating controller is configured to determine whether the temperature associated with the sequential logic block is below or above the particular temperature based on an amount of energy consumed by one or more logic blocks associated with the sequential logic block.
9. A system comprising:
a voltage converter configured to provide a supply voltage to power a sequential logic block; and
a pre-heating controller configured to control the voltage converter to increase the supply voltage if a temperature associated with the sequential logic block is determined to be below a particular temperature.
10. The system of claim 9, wherein the sequential logic block comprises a first device that has an operating speed that decreases with decreasing temperature of the first device.
11. The system of claim 10, wherein the sequential logic block comprises a storage element configured to store a logic value produced at least in part by the first device.
12. The system of claim 10, wherein the first device is configured to form an inversion layer at a first threshold voltage and is implemented on an integrated circuit with a second device, the second device configured to form an inversion layer at a second threshold voltage that is less than the first threshold voltage.
13. The system of claim 12, wherein the first device and the second device are transistors.
14. The system of claim 9, further comprising:
a temperature sensor configured to sense the temperature associated with the sequential logic block.
15. The system of claim 9, wherein the pre-heating controller is configured to determine whether the temperature associated with the sequential logic block is below or above the particular temperature based on a number of clock cycles of the clock signal that have elapsed.
16. The system of claim 9, wherein the pre-heating controller is configured to determine whether the temperature associated with the sequential logic block is below or above the particular temperature based on an amount of energy consumed by one or more logic blocks associated with the sequential logic block.
17. A system comprising:
a heating block configured to pre-heat a sequential logic block; and
a pre-heating controller configured to run the heating block and delay running the sequential logic block if a temperature associated with the sequential logic block is determined to be below a particular temperature.
18. The system of claim 17, wherein the sequential logic block comprises a first device that has an operating speed that decreases with decreasing temperature of the first device.
19. The system of claim 18, wherein the sequential logic block comprises a storage element configured to store a logic value produced at least in part by the first device.
20. The system of claim 18, wherein the first device is configured to form an inversion layer at a first threshold voltage and is implemented on an integrated circuit with a second device, the second device configured to form an inversion layer at a second threshold voltage that is less than the first threshold voltage.