What is claimed is:
1. A method for handling a signal, is applied suitably to a hold-type display, comprising:
providing an input signal;
providing a signal process module, wherein the signal process module consisting of a digital signal process module;
performing a digital signal process toward the input signal with the digital signal process module for obtaining a compensative signal of the input signal; and
performing a compiling process with the compensative signal and the input signal thereby outputting an output signal, wherein the output signal has a pre-determined function within a frequency band.
2. The method of handling a signal according to claim 1, wherein the input signal is valid wave.
3. The method of handling a signal according to claim 1, wherein the signal process module is selected from a group consisting of software, firmware and hardware.
4. The method of handling a signal according to claim 1, wherein the digital signal process is the process of an inverse function to the input signal.
5. The method of handling a signal according to claim 1, wherein the compiling process is performed by a module selected from a group consisting of software, firmware and hardware.
6. The method of handling a signal according to claim 1, wherein the pre-determined function is a zero order function.
7. The method of handling a signal according to claim 6, wherein the zero order function is a horizontal wave distribution, and the horizontal wave distribution is based on the digital signal process within the frequency band.
8. The method of handling a signal according to claim 1, wherein the pre-determined function is a first order function.
9. The method of handling a signal according to claim 8, wherein the first order function is a first wave that is rising gradually, and the first wave is based on the digital signal process within the frequency band.
10. The method of handling a signal according to claim 1, wherein the pre-determined function is a second order function.
11. The method of handling a signal according to claim 10, wherein the second order function is a second wave that is rising gradually, and the second wave is based on the digital signal process within the frequency band.
12. A method for handling a display signal of a LCD, comprising:
providing an input signal;
providing a display signal process and drive module, wherein the display signal process and drive module consisting of a digital signal process module;
performing a digital signal process toward the input signal by the digital signal process module for obtaining a compensative signal of the input signal; and
performing a compiling process with the compensative signal and the input signal thereby outputting an output signal, wherein the output signal has a pre-determined function within a frequency band.
13. The method for handling a display signal of a LCD according to claim 12, wherein the input signal is valid wave.
14. The method for handling a display signal of a LCD according to claim 12, wherein the display signal process and drive module is selected from a group consisting of software, firmware and hardware.
15. The method for handling a display signal of a LCD according to claim 12, wherein the digital signal process is the process of an inverse function to the input signal.
16. The method of handling a display signal of a LCD according to claim 12, wherein the compiling process is performed by a module selected from a group consisting of software, firmware and hardware.
17. The method of handling a display signal of a LCD according to claim 12, wherein the pre-determined function is a zero order function.
18. The method of handling a display signal of a LCD according to claim 17, wherein the zero order function is a horizontal wave, and the horizontal wave distribution is based on the digital signal process within the frequency band.
19. The method of handling a display signal of a LCD according to claim 12, wherein the pre-determined function is a first order function.
20. The method of handling a display signal of a LCD according to claim 19, wherein the first order function is a first wave that is rising gradually, and the first wave is based on the digital signal process within the frequency band.
21. The method of handling a display signal of a LCD according to claim 12, wherein the pre-determined function is a second order function.
22. The method of handling a display signal of a LCD according to claim 21, wherein the second order function is a second wave that is rising gradually, and the second wave is based on the digital signal process within the frequency band.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A panel comprising a thin film transistor, the panel comprising:
a substrate;
a light blocking layer on the substrate, the light blocking layer comprising first sidewalls;
a first protective film on the light blocking layer, the first protective film comprising second sidewalls;
a first electrode and a second electrode on the first protective film, the first electrode comprising third sidewalls and the second electrode comprising fourth sidewalls spaced apart from the first electrode;
an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, and on at least a portion of the third sidewalls, the fourth sidewalls, the first electrode, and the second electrode;
an insulating layer on the oxide semiconductor layer, the first electrode, the second electrode, the first sidewalls, the second sidewalls, the third sidewalls, and the fourth sidewalls;
a third electrode overlapping with the oxide semiconductor layer and on the insulating layer; and
a fourth electrode on the insulating layer, the fourth electrode connected to the second electrode,
wherein at least a portion of the first sidewalls and at least a portion of the second sidewalls are disposed along substantially the same line.
2. The panel of claim 1, wherein at least a portion of the third sidewalls and at least a portion of the fourth sidewalls are disposed along substantially the same line with at least a portion of the second sidewalls.
3. The panel of claim 2, further comprising:
a data line configured to transmit a data signal to the first electrode; and
a data pad connected to the end of the data line,
wherein the first protective film and the light blocking layer are disposed under the data pad.
4. The panel of claim 3, wherein at least a portion of the first sidewalls and at least a portion of the second sidewalls are disposed along substantially the same line as at least a portion of sidewalls of the data pad.
5. The panel of claim 2, wherein at least one sidewall of the oxide semiconductor layer is disposed inside the second sidewalls.
6. The panel of claim 5, wherein a sidewall of the third electrode is disposed between the at least one sidewall of the oxide semiconductor layer and the second sidewalls.
7. The panel of claim 2, further comprising a second protective film disposed between the insulating layer and the fourth electrode, the second protective film comprising a color filter.
8. The panel of claim 2, further comprising:
a gate line configured to transmit a gate signal to the third electrode;
a gate pad connected to the end of the gate line, and
a contact assistant on the gate pad,
wherein the contact assistant is in contact with the insulating layer.
9. The panel of claim 8, comprising a transparent film in contact with the third electrode.
10. A method for forming a panel comprising a thin film transistor, the method comprising:
forming a light blocking layer on a substrate;
forming a first protective film on the light blocking layer;
forming a first electrode and a second electrode on the first protective film and spaced apart from the each other;
forming an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode and on at least a portion of the first electrode and the second electrode;
forming an insulating layer on the oxide semiconductor layer, the first electrode, and the second electrode;
forming a third electrode overlapping with the oxide semiconductor layer and on the insulating layer; and
forming a fourth electrode on the insulating layer, and connected to the second electrode,
wherein the light blocking layer, the first protective film, the first electrode, and the second electrode are formed using a single mask.
11. The method of claim 10, wherein forming the light blocking layer, the first protective film, the first electrode, and the second electrode using the single mask comprises:
forming a light blocking material on the substrate;
forming a protective layer on the light blocking material;
forming a first conductive layer on the protective layer;
forming a photo-resist on the protective layer and pattering the photo-resist using the single mask to form a photo-resist pattern with a step portion, and
etching the light blocking material, the protective layer, and the first conductive layer using the photo-resist pattern as an etching mask to form the light blocking layer, the first protective film, the first electrode, and the second electrode.
12. The method of claim 11, wherein a portion of the photo-resist pattern in an area corresponding to an area between the first electrode and the second electrode is thinner than a portion of the photo-resist pattern in an area corresponding to the first electrode and the second electrode.
13. The method of claim 12, wherein forming the first electrode and the second electrode comprises etching the first conductive layer to form a data line connected to the first electrode and a data pad connected to the end of the data line.
14. The method of claim 13, wherein forming the third electrode comprises:
forming a second conductive layer on the insulating layer;
patterning the second conductive layer to form the third electrode, a gate line, and a gate pad, the gate line connected to the third electrode, and the gate pad connected to the end of the gate line.
15. The method of claim 12, wherein forming the fourth electrode comprises:
forming a transparent conductive layer on the third electrode and the insulating layer; and
patterning the transparent conductive layer to form the fourth electrode and a transparent conductive film, the transparent conductive film in contact with the third electrode.
16. A panel comprising a thin film transistor, the panel comprising:
a substrate;
a light blocking layer on the substrate, the light blocking layer comprising first sidewalls;
a first protective film on the blocking layer, the first protective film comprising second sidewalls;
an oxide semiconductor layer on the first protective film, the oxide semiconductor layer comprising third sidewalls;
a first electrode and a second electrode spaced apart from each other on the oxide semiconductor layer, the first electrode comprising fourth sidewalls and the second electrode comprising fifth sidewalls;
an insulating layer on the first electrode, the second electrode, the first sidewalls, the second sidewalls, the third sidewalls, the fourth sidewalls, and the fifth sidewalls;
a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and
a fourth electrode the insulating layer, the fourth electrode connected to the second electrode,
wherein at least a portion of the first sidewalls, at least a portion of the second sidewalls, and at least a portion of the third sidewalls are disposed along substantially the same line.
17. The panel of claim 16, wherein at least a portion of the fourth sidewalls and at least a portion of the fifth sidewalls are disposed along substantially the same line with at least a portion of the third sidewalls.
18. A method for forming a panel comprising a thin film transistor, the method comprising:
forming a light blocking layer on a substrate;
forming a first protective film on the light blocking layer;
forming an oxide semiconductor layer on the first protective film;
forming a first electrode and a second electrode spaced apart from each other on the oxide semiconductor layer;
forming an insulating layer on the oxide semiconductor layer, the first electrode, and the second electrode;
forming a third electrode overlapping with the oxide semiconductor layer and on the insulating layer; and
forming a fourth electrode on the insulating layer, the fourth electrode connected to the second electrode,
wherein the light blocking layer, the first protective film, the oxide semiconductor layer, the first electrode, and the second electrode are formed using a single mask.
19. A panel comprising a thin film transistor, the panel comprising:
a substrate;
a first protective film on the substrate;
a first electrode and a second electrode on the first protective film, the first electrode and the second electrode spaced apart from each other and exposing a portion of the first protective film;
an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, the first electrode, and the second electrode;
an insulating layer on the oxide semiconductor layer, the first electrode, and the second electrode;
a third electrode overlapping with the oxide semiconductor layer and on the insulating layer; and
a fourth electrode on the insulating layer, the fourth electrode connected to the second electrode,
wherein the first protective film comprises opaque silicon oxide, opaque silicon nitride, or both opaque silicon oxide and opaque silicon nitride.
20. The panel of claim 19, wherein the first protective film comprises first sidewalls, and the first electrode and the second electrode comprise second sidewalls and third sidewalls respectively,
wherein at least a portion of the second sidewalls and at least a portion of the third sidewalls are disposed along substantially the same line with at least a portion of the first sidewalls.
21. A method for forming a panel comprising a thin film transistor, the method comprising:
forming a first protective film on a substrate;
forming a first electrode and a second electrode on the first protective film, the first electrode and the second electrode spaced apart from each other and exposing a portion of the first protective film;
forming an oxide semiconductor layer on the first electrode, the second electrode, and the exposed portion of the first protective film;
forming an insulating layer on the oxide semiconductor layer, the first electrode, and the second electrode;
forming a third electrode on the insulating layer; and
forming a fourth electrode on the insulating layer, the fourth electrode connected to the second electrode,
wherein the first protective film is formed to be opaque by controlling a partial pressure of nitrogen gas or oxygen gas.
22. A thin film transistor, comprising:
a substrate;
a light blocking layer on the substrate, the light blocking layer comprising first sidewalls;
a first protective film on the light blocking layer, the first protective film comprising second sidewalls;
a first electrode and a second electrode on the first protective film and spaced apart from each other, the first electrode comprising third sidewalls and the second electrode comprising fourth sidewalls;
an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, and on at least a portion of the third sidewalls, the fourth sidewalls, the first electrode, and the second electrode;
an insulating layer on the oxide semiconductor layer, the first electrode, the second electrode, the first sidewalls, the second sidewalls, the third sidewalls, and the fourth sidewalls; and
a third electrode overlapping with the oxide semiconductor layer and on the insulating layer,
wherein at least a portion of the first sidewalls and at least a portion of the second sidewalls are disposed along substantially the same line.
23. A thin film transistor, comprising:
a substrate;
a light blocking layer on the substrate, the light blocking layer comprising first sidewalls;
a first protective film on the light blocking layer, the first protective film comprising second sidewalls;
an oxide semiconductor layer on the first protective film, the oxide semiconductor layer comprising third sidewalls;
a first electrode and a second electrode spaced apart from each other on the oxide semiconductor, the first electrode comprising fourth sidewalls and the second electrode comprising fifth sidewalls;
an insulating layer on the first electrode, the second electrode, the first sidewalls, the second sidewalls, the third sidewalls, the fourth sidewalls, and the fifth sidewalls, and
a third electrode overlapping with the oxide semiconductor layer and on the insulating layer,
wherein at least a portion of the first sidewalls, at least a portion of the second sidewalls, and at least a portion of the third sidewalls are disposed along substantially the same line.
24. A thin film transistor, comprising:
a substrate;
a first protective film on the substrate;
a first electrode and a second electrode on the first protective film, the first electrode and the second electrode spaced apart from each other to expose a portion of the first protective film;
an oxide semiconductor layer on the exposed portion of the first protective film, and on at least a portion of the first electrode and the second electrode;
an insulating layer on the oxide semiconductor layer, the first electrode, and the second electrode; and
a third electrode overlapping with the oxide semiconductor layer and on the insulating layer,
wherein the first protective film comprises opaque silicon oxide, opaque silicon nitride, or both opaque silicon oxide and opaque silicon nitride.
25. A display panel, comprising:
a substrate;
a light blocking layer on the substrate;
a first protective film on the light blocking layer;
a first conductive layer on the first protective film, the first conductive layer comprising a first conductive line, a first electrode protruding from the first conductive line, and a second electrode spaced apart from the first electrode, thereby exposing a portion of the first protective film;
an oxide semiconductor layer on the first protective film, the first electrode, and the second electrode;
an insulating layer on the oxide semiconductor layer and the first conductive layer;
a third electrode overlapping with the oxide semiconductor layer and on the insulating layer; and
a fourth electrode connected to the second electrode,
wherein the light blocking layer and the first protective film have substantially the same pattern, and the first protective film and the first conductive layer have substantially the same pattern except for the exposed portion of the first protective film.