1. A liquid crystal display device comprising:
a plurality of video signal lines respectively for transmitting a plurality of video signals representing an image to be displayed;
a plurality of scanning signal lines intersecting with the plurality of video signal lines;
a plurality of pixel formation portions arranged in matrix respectively corresponding to intersections between the plurality of video signal lines and the plurality of scanning signal lines, each pixel formation portion including a first switching element and a pixel electrode, the first switching element having a control terminal connected to the scanning signal line passing through the corresponding intersection and a first conductive terminal connected to the video signal line passing through the corresponding intersection, the pixel electrode being connected to a second conductive terminal of the first switching element;
a scanning signal line drive circuit including a shift register configured by a plurality of bistable circuits which are provided so as to have a one-to-one corresponding with the plurality of scanning signal lines, the shift register sequentially outputting a pulse based on a clock signal that cyclically repeats a first potential and a second potential, the scanning signal line drive circuit being configured to selectively drive the plurality of scanning signal lines based on the pulse outputted from the shift register and being formed on the same substrate as the substrate on which the plurality of scanning signal lines are formed;
a power-supply condition detecting unit configured to detect ONOFF state of power-supply that is given externally;
a reference potential generating unit configured to generate a reference potential of the plurality of bistable circuits; and
a reference potential line for transmitting the reference potential generated by the reference potential generating unit to the plurality of bistable circuits, wherein
each bistable circuit includes a potential level maintaining unit for electrically connecting the corresponding scanning signal line with the reference potential line such that a potential level of the corresponding scanning signal line is maintained at the level of the reference potential during a time period in which the corresponding scanning signal line is in an unselected state, and
when the OFF state of the power-supply is detected by the power-supply condition detecting unit,
the potential level maintaining unit included in each bistable circuit electrically connects the scanning signal line corresponding to the bistable circuit with the reference potential line, and
the reference potential generating unit increasing the level of the reference potential up to a level at which the first switching element becomes conductive.
2. The liquid crystal display device according to claim 1, further comprising:
a clock signal generating unit configured to generate the clock signal, wherein
the potential level maintaining unit included in each bistable circuit includes a second switching element having a first conductive terminal connected to the reference potential line, a second conductive terminal connected to the scanning signal line corresponding to the bistable circuit, and a control terminal to which the clock signal is supplied, and
when the OFF state of the power-supply is detected by the power-supply condition detecting unit, the clock signal generating unit sets the clock signal to the first potential or the second potential such that the second switching element included in each bistable circuit becomes conductive.
3. The liquid crystal display device according to claim 2, wherein
the potential level maintaining unit included in each bistable circuit includes a plurality of the second switching elements,
the clock signal generating unit generates a plurality of the clock signals to be respectively supplied to control terminals of the plurality of second switching elements included in each potential level maintaining unit, and
when the OFF state of the power-supply is detected by the power-supply condition detecting unit, the clock signal generating unit sets the plurality of clock signals to the first potential or the second potential respectively such that the plurality of second switching elements included in each potential level maintaining unit become conductive.
4. The liquid crystal display device according to claim 1, wherein
the reference potential generating unit includes a level shifting circuit configured to convert a potential level of a predetermined inputted signal, thereby supplying a predetermined high level potential or a predetermined low level potential to the reference potential line, and
the level shifting circuit supplies:
the low level potential to the reference potential line as the reference potential, when the OFF state of the power-supply is not detected by the power-supply condition detecting unit, and
the high level potential to the reference potential line as the reference potential, when the OFF state of the power-supply is detected by the power-supply condition detecting unit.
5. A method of driving a liquid crystal display device,
the liquid crystal display device provided with: a plurality of video signal lines respectively for transmitting a plurality of video signals representing an image to be displayed; a plurality of scanning signal lines intersecting with the plurality of video signal lines; a plurality of pixel formation portions arranged in matrix respectively corresponding to intersections between the plurality of video signal lines and the plurality of scanning signal lines, each pixel formation portion including a first switching element and a pixel electrode, the first switching element having a control terminal connected to the scanning signal line passing through the corresponding intersection and a first conductive terminal connected to the video signal line passing through the corresponding intersection, the pixel electrode being connected to a second conductive terminal of the first switching element; and a scanning signal line drive circuit formed on the same substrate as the substrate on which the plurality of scanning signal lines are formed and including a shift register configured by a plurality of bistable circuits which are provided so as to have a one-to-one corresponding with the plurality of scanning signal lines, the shift register sequentially outputting a pulse based on a clock signal that cyclically repeats a first potential and a second potential, the scanning signal line drive circuit being configured to selectively drive the plurality of scanning signal lines based on the pulse outputted from the shift register, the method comprising:
a power-supply condition detecting step of detecting ONOFF state of power-supply that is given externally; and
a reference potential generating step of generating a reference potential of the plurality of bistable circuits, wherein
the liquid crystal display device is further provided with a reference potential line for transmitting the reference potential generated in the reference potential generating step to the plurality of bistable circuits, and
when the OFF state of the power-supply is detected in the power-supply condition detecting step,
the scanning signal line corresponding to each bistable circuit and the reference potential line are electrically connected, and
the level of the reference potential is increased up to a level at which the first switching element becomes conductive in the reference potential generating step.
6. The method of driving according to claim 5, further comprising:
a clock signal generating step of generating the clock signal, wherein
each bistable circuit includes a second switching element having a first conductive terminal connected to the reference potential line, a second conductive terminal connected to the scanning signal line corresponding to the bistable circuit, and a control terminal to which the clock signal is supplied, and
when the OFF state of the power-supply is detected in the power-supply condition detecting step, the clock signal is set to the first potential or the second potential such that the second switching element included in each bistable circuit becomes conductive in the clock signal generating step.
7. The method of driving according to claim 6, wherein
each bistable circuit includes a plurality of the second switching elements,
a plurality of the clock signals to be respectively supplied to control terminals of the plurality of second switching elements included in each bistable circuit are generated in the clock signal generating step, and
when the OFF state of the power-supply is detected in the power-supply condition detecting step, the plurality of clock signals are set to the first potential or the second potential such that the plurality of second switching elements included in each bistable circuit become conductive in the clock signal generating step.
8. The method of driving according to claim 5, further comprising:
a level converting step of converting a potential level of a predetermined inputted signal to supply a predetermined high level potential or a predetermined low level potential to the reference potential line, and
in the level converting step,
when the OFF state of the power-supply is not detected in the power-supply condition detecting step, the potential level of the inputted signal is converted to the low level potential, and
when the OFF state of the power-supply is detected in the power-supply condition detecting step, the potential level of the inputted signal is converted to the high level potential.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An array substrate for an in-plane switching mode liquid crystal display
device, comprising: a substrate;
a gate line disposed on the substrate;
a data line crossing the gate line to define a pixel region;
a thin film transistor connected to the gate line and the data line;
pixel electrodes disposed in the pixel region and connected to the thin film transistor;
common electrodes disposed in the pixel region and alternating with the pixel electrodes;
a semiconductor layer disposed under the data line and including a portion having a width greater than a width of the data line; and
a first blocking pattern over the data line and substantially covering the semiconductor layer.
2. The array substrate according to claim 1, wherein the first blocking pattern contacts the data line.
3. The array substrate according to claim 1, further comprising a second blocking pattern under the semiconductor layer, wherein the second blocking pattern is formed of a same material and in a same layer as the gate line.
4. An in-plane switching mode liquid crystal display device, comprising: first and second substrates spaced apart from each other;
a liquid crystal material disposed between the first and second substrates; a gate line on an inner surface of the first substrate;
a data line crossing the gate line to define a pixel region;
a thin film transistor connected to the gate line and the data line;
pixel electrodes in the pixel region and connected to the thin film transistor; common electrodes in the pixel region and alternating with the pixel electrodes;
a semiconductor layer under the data line and including a portion having a width greater than a width of the data line;
a first blocking pattern comprising an opaque material and disposed under the semiconductor layer;
a second blocking pattern disposed over the data line and substantially covering the semiconductor layer;
a black matrix on an inner surface of the second substrate; and a color filter layer on the inner surface of the second substrate.
5. The in-plane switching mode liquid crystal display device of claim 4, wherein the second blocking pattern contacts the data line.