1. An apparatus for treating packagings, including containers, the apparatus comprising:
at least one transport unit which transports the containers along a specified transport path, said transport unit including a transport element which contacts at least an area of the containers during transport via a first contact surface; and
at least one treatment unit which treats the containers in a specified manner, said treatment unit having a treatment element which is in contact, at least temporarily, with a surface of the container via a second contact surface,
wherein at least one of said first and second contact surfaces is designed to be germicidal.
2. The apparatus as claimed in claim 1, wherein at least one of said first and second contact surfaces has a germicidal coating.
3. The apparatus as claimed in claim 1, wherein at least one of said first and second contact surfaces has a silver ion coating.
4. The apparatus as claimed in claim 1, further comprising a cleanroom, within which the containers are transported.
5. The apparatus as claimed in claim 1, wherein the transport member is selected from a group of transport members which includes grippers, heating mandrels, and sorting rollers.
6. The apparatus as claimed in claim 1, wherein the treatment element is selected from a group of treatment elements including blow nozzles, stretching rods, blow moulds, heating mandrels, and support rings.
7. The apparatus as claimed in claim 1, further comprising a sterilisation unit that sterilises the containers at least in sections.
8. The apparatus as claimed in claim 7, wherein at least one contact of said first and second contact surfaces is arranged downstream in relation to the sterilisation unit in the transport direction of the container.
9. The apparatus as claimed in claim 1, further comprising a moulding unit for moulding plastic preforms into plastic containers.
10. The apparatus as claimed in claim 1, wherein in a specified transport area of the containers, all the contact surfaces that come into contact with the containers have been modified so as to be germicidal.
11. A method for treating packagings, including containers, the method comprising:
transporting a container with transport members of a first transport unit, the transport members being temporarily in contact with the container via a first contact surface; and
treating the container with treatment members of a treatment unit, the treatment members of the treatment unit being temporarily in contact with the container via a second contact surface,
wherein at least one of the first and second contact surfaces is designed to be germicidal.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A method for driving a semiconductor memory including a ferroelectric capacitor for storing a multi-valued data in accordance with a displacement of polarization of a ferroelectric film thereof and detection means connected to a first electrode corresponding to one of an upper electrode and a lower electrode of said ferroelectric capacitor for detecting the displacement of the polarization of said ferroelectric film, comprising:
a first step of reading said multi-valued data by detecting the displacement of the polarization of said ferroelectric film by said detection means with a reading voltage applied to a second electrode corresponding to the other of said upper electrode and said lower electrode of said ferroelectric capacitor; and
a second step of removing said reading voltage applied to said second electrode,
wherein said reading voltage applied in the first step has such magnitude that the displacement of the polarization of said ferroelectric film is restored to that obtained before reading said multi-valued data by removing said reading voltage in the second step.
2. The method for driving a semiconductor memory of claim 1, further comprising, after the second step, a third step of making a potential difference between said upper electrode and said lower electrode of said ferroelectric capacitor zero.
3. The method for driving a semiconductor memory of claim 2,
wherein the third step includes a sub-step of applying a voltage with polarity different from polarity of said reading voltage to said first electrode before making said potential difference zero.
4. The method for driving a semiconductor memory of claim 2,
wherein said semiconductor memory includes a switch for equalizing the potentials of said first electrode and said second electrode of said ferroelectric capacitor, and
the third step includes a sub-step of making said potential difference zero with said switch.
5. The method for driving a semiconductor memory of claim 2,
wherein said semiconductor memory includes a switch for equalizing the potentials of said first electrode of said ferroelectric capacitor and potential, and
the third step includes a sub-step of applying a constant potential to said second electrode of said ferroelectric capacitor and making said potential difference zero with said switch.
6. The method for driving a semiconductor memory of claim 1,
wherein said reading voltage applied in the first step has such magnitude that a voltage applied between said first electrode and said second electrode of said ferroelectric capacitor when said reading voltage is applied is smaller than a coercive voltage of said ferroelectric capacitor.
7. The method for driving a semiconductor memory of claim 1,
wherein said detection means has a load capacitor,
the first step includes a sub-step of applying said reading voltage to both ends of a series circuit composed of said ferroelectric capacitor and said load capacitor, and
said detection means detects the displacement of the polarization of said ferroelectric film by detecting a voltage applied to said load capacitor that is obtained by dividing said reading voltage in accordance with a ratio between the capacitance of said ferroelectric capacitor and the capacitance of said load capacitor.
8. The method for driving a semiconductor memory of claim 1,
wherein said detection means includes a field effect transistor formed on a substrate and having a gate electrode connected to said first electrode of said ferroelectric capacitor,
the first step includes a sub-step of applying said reading voltage between said second electrode of said ferroelectric capacitor and said substrate, and
said detection means detects the displacement of the polarization of said ferroelectric film by detecting a current flowing between a drain region and a source region of said field effect transistor when a voltage obtained by dividing said reading voltage in accordance with a ratio between the capacitance of said ferroelectric capacitor and the gate capacitance of said field effect transistor is applied to said gate electrode of said field effect transistor.
9. A method for driving a semiconductor memory including a plurality of successively connected ferroelectric capacitors each storing a multi-valued data in accordance with the displacement of polarization of a ferroelectric film thereof, a plurality of selecting transistors respectively connected to said plurality of ferroelectric capacitors for selecting one of said ferroelectric capacitors for reading said multi-valued data, and detection means connected to one end of said plurality of successively connected ferroelectric capacitors for reading said multi-valued data by detecting the displacement of the polarization of said ferroelectric film included in one ferroelectric capacitor selected by said selecting transistors, comprising:
a first step of applying a reading voltage to one of an upper electrode and a lower electrode of each of said ferroelectric capacitors; and
a second step of removing said reading voltage applied to said one electrode,
wherein said reading voltage applied in the first step has such magnitude that the displacement of the polarization of said ferroelectric film is restored to that obtained before reading said multi-valued data by removing said reading voltage in the second step.
10. The method for driving a semiconductor memory of claim 9, further comprising, after the second step, a third step of making a potential difference between said upper electrode and said lower electrode of said ferroelectric capacitor zero.