Having thus described our invention in detail, what we claims as new, and desire to secure by the Letters Patent is:
1. A capacitor comprising an amorphous dielectric material having a dielectric constant of 10 or greater positioned between two electrodes.
2. The capacitor of claim 1 wherein the amorphous dielectric material is fabricated at temperatures below 450 C.
3. The capacitor of claim 1 wherein the amorphous dielectric constant material is a thin film having a thickness of from about 25 to about 500 nm.
4. The capacitor of claim 1 wherein said amorphous dielectric material is a perovskite-type oxide having the formula ABO3 wherein B is at least one acidic oxide containing a metal selected from Group IVB, VB, VIB, VIIB or IB of the Periodic Table of Elements, and A is at least one additional cation having a positive formal charge of from about 1 to about 3.
5. The capacitor of claim 4 wherein said perovskite-type oxide is a titanate-based dielectric, a manganate-based material, a cuprate-based material, a tungsten bronze-type niobate, tantalate or titanate, or a layered bismuth-tantalate, -niobate or -titanate.
6. The capacitor of claim 1 wherein said amorphous dielectric material is barium strontium titanate, barium titanate, lead zirconium titanate, tantalum titanate, lead lanthanum titanate, strontium titanate, barium strontium niobate, barium zirconium titanate or barium titanium niobate.
7. The capacitor of claim 1 wherein said amorphous dielectric material is barium strontium titanate or barium zirconium titanate.
8. The capacitor of claim 1 wherein said electrodes are composed of a conductive material.
9. The capacitor of claim 8 wherein said conductive material is composed of the same or different material selected from the group consisting of TaN, Pt, Ir, ruthenium oxide, Al, Au, Cu, Ta, TaSiN and combinations or multilayers thereof.
10. An integrated circuit chip having multiple wiring levels each of said wiring levels being separated by an insulating material, wherein a capacitor in accordance to claim 1 is formed over an insulating material which separates the capacitor from the multiple wiring levels of the integrated circuit chip.
11. The integrated circuit chip according to claim 10 wherein the amorphous dielectric material of said capacitor is fabricated at temperatures below 450 C.
12. The integrated circuit chip according to claim 10 wherein the amorphous dielectric material of said capacitor is a thin film having a thickness of from about 25 to about 500 nm.
13. The integrated circuit chip according to claim 10 wherein said amorphous dielectric material of said capacitor is a perovskite-type oxide having the formula ABO3 wherein B is at least one acidic oxide containing a metal selected from Group IVB, VB, VIB, VIIB or IB of the Periodic Table of Elements, and A is at least one additional cation having a positive formal charge of from about 1 to about 3.
14. The integrated circuit chip according to claim 10 wherein said perovskite-type oxide is a titanate-based dielectric, a manganate-based material, a cuprate-based material, a tungsten bronze niobate, titanate or tantalate, or a layered bismuth tantalate, -niobate or -titanate.
15. The integrated circuit chip according to claim 10 wherein said amorphous dielectric material of said capacitor is barium strontium titanate, barium titanate, lead zirconium titanate, tantalum titanate, lead lanthanum titanate, strontium titanate, barium strontium niobate, barium zirconium titanate or barium strontium tantalate.
16. The integrated circuit chip according to claim 10 wherein said amorphous dielectric material of said capacitor is barium strontium titanate or barium zirconium titanate.
17. The integrated circuit chip according to claim 10 wherein said insulating material is composed of a oxide, nitride or any other organic or inorganic insulating material.
18. The integrated circuit chip according to claim 10 wherein said wiring levels is composed of a conductive material.
19. The integrated circuit of claim 18 wherein said conductive material is the same or different and is selected from the group consisting of TaN, Pt, Ir, ruthenium oxide, Al, Au, Cu, Ta, TaSiN and mixtures or multilayers thereof.
20. A method for forming a decoupling capacitor comprising the steps of:
(a) forming a film of an amorphous dielectric material having a dielectric constant of 10 or greater on a surface of an insulating layer;
(b) patterning the amorphous dielectric material into discrete sections; and
(c) depositing conducting electrodes between the patterned areas.
21. The method of claim 20 wherein step (a) includes deposition at temperatures under 450 C. and annealing at temperatures under 450 C.
22. The method of claim 20 wherein said deposition is carried out by chemical vapor deposition (CVD), physical vapor deposition, plasma-assisted CVD, low pressure CVD, high density plasma CVD, ionized PVP or chemical solution deposition (CSD).
23. The method of claim 22 wherein said deposition is by chemical solution deposition (CSD).
24. The method of claim 21 wherein said annealing is carried out in an oxidizing gas at a temperature of from about 150 to about 450 C. for a time period of from about 0.1 to about 4 hrs.
25. The method of claim 20 wherein step (b) is carried out by lithography.
26. The method of claim 20 wherein the amorphous dielectric material is a thin film having a thickness of from about 25 to about 500 nm.
27. The method of claim 20 wherein said amorphous dielectric material is a perovskite-type oxide having the formula ABO3 wherein B is at least one acidic oxide containing a metal selected from Group IVB, VB, VIB, VIIB or IB of the Periodic Table of Elements, and A is at least one additional cation having a positive formal charge of from about 1 to about 3.
28. The method of claim 27 wherein said perovskite-type oxide is a titanate-based dielectric, a manganate based material, a cuprate-based material, a tungsten bronze-type niobate, tantalate or titanate, or a layered bismuth-tantalate, -niobate or -titanate.
29. The method of claim 20 wherein said amorphous dielectric material is barium strontium titanate, barium titanate, lead zirconium titanate, tantalum titanate, lead lanthanum titanate, strontium titanate, barium titanate niobate, barium zirconium titanate or barium strontium niobate.
30. The method of claim 20 wherein said amorphous dielectric material is barium strontium titanate or barium zirconium titanate.
31. A method for forming a decoupling capacitor comprising the steps of:
(a) depositing a layer of a conducting material on a surface of an insulating layer;
(b) patterning the conducting material into discrete sections; and
(c) forming an amorphous dielectric material having a dielectric constant of 10 or greater between the discrete sections.
32. The method of claim 31 wherein step (c) includes deposition at temperatures under 450 C. and annealing at temperatures under 450 C.
33. The method of claim 32 wherein said deposition is carried out by chemical vapor deposition (CVD), physical vapor deposition, plasma-assisted CVD, low pressure CVD, high density plasma CVD, ionized PVP or chemical solution deposition (CSD).
34. The method of claim 33 wherein said deposition is by CSD.
35. The method of claim 32 wherein said annealing is carried out in an oxidizing gas at a temperature of from about 200 to about 450 C. for a time period of from about 0.1 to about 4 hrs.
36. The method of claim 31 wherein step (b) is carried out by lithography.
37. The method of claim 31 wherein the amorphous dielectric material is a thin film having a thickness of from about 25 to about 500 nm.
38. The method of claim 31 wherein said amorphous dielectric material is a perovskite-type oxide having the formula ABO3 wherein B is at least one acidic oxide containing a metal selected from Group IVB, VB, VIB, VIIB or IB of the Periodic Table of Elements, and A is at least one additional cation having a positive formal charge of from about 1 to about 3.
39. The method of claim 38 wherein said perovskite or tungsten bronze-type oxide is a titanate or tantalate-based dielectric, a manganate-based material, a cuprate-based material, a tungsten bronze-type niobate, tantalate or titanate, or a layered bismuth-tantalate, -niobate or -titanate.
40. The method of claim 31 wherein said amorphous dielectric material is barium strontium titanate, barium titanate, lead zirconium titanate, tantalum titanate, lead lanthanum titanate or strontium titanate, barium titanate niobate, barium zirconium titanate or barium strontium niobate.
41. The method of claim 31 wherein said amorphous dielectric material is barium strontium titanate or barium zirconium titanate.
42. An integrated circuit (IC) semiconductor device comprising
a damascene structure, said damascene structure including alternating dielectric interlevels and wiring levels, wherein each of said wiring levels are interconnected by vias and contain a cap layer thereon; and
a patterned decoupling capacitor formed over the outermost wiring level, said patterned decoupling capacitor comprising a bottom electrode, an amorphous high dielectric constant thin film and an upper electrode.
43. The IC semiconductor device of claim 42 further comprising a metal fuse for separately connecting segments of said upper electrode to its voltage supply.
44. The IC semiconductor device of claim 42 further comprising sidewall spacers on each side of the patterned decoupling capacitor.
45. A semiconductor device comprising
a damascene structure, said damascene structure including alternating dielectric interlevels and wiring levels, wherein each of said wiring levels are interconnected by vias and contain a cap layer thereon; and
a patterned decoupling capacitor formed over the wiring level underlying the outermost wiring level, said patterned stack decoupling capacitor comprising a bottom electrode, an amorphous high dielectric constant thin film and an upper electrode, said upper electrode being interconnected with said outermost wiring level by a via.
46. The IC semiconductor device of claim 45 further comprising a metal fuse for separately connecting segments of said upper electrode to its voltage supply.
47. The IC semiconductor device of claim 45 further comprising sidewall spacers on each side of the patterned decoupling capacitor.
48. An integrated circuit (IC) semiconductor device comprising
a damascene structure, said damascene structure including alternating dielectric interlevels and wiring levels, wherein said outermost dielectric interlevel contains a trench therein;
a patterned decoupling capacitor formed in said trench, said patterned decoupling capacitor comprising a bottom electrode, an amorphous high dielectric constant thin film and an upper electrode; and
sidewall spacers on each side of the patterned decoupling capacitor.
49. The IC semiconductor device of claim 48 further comprising a metal fuse for separately connecting segments of said upper electrode to its voltage supply.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A composite panel, comprising:
a core having first and second sides, the core including a first section of honeycomb material and a second section surrounded by and bonded to the first section, the second section including laminated plies of composite material forming an essentially solid plank; and
laminated plies of composite material bonded to the first and second sides of the core and covering the solid plank.
2. The composite panel of claim 1, wherein the laminated plies of the solid plank include glass fiber reinforced resin.
3. The composite panel of claim 1, wherein the first section is bonded to the second section by a foam adhesive.
4. The composite panel of claim 1, wherein the laminated plies covering the solid plank include ply doublers.
5. The composite panel of claim 1, further comprising means for attaching a support to the panel in the area of the second section of the core.
6. A composite panel for aerospace vehicles, comprising:
a first, essentially solid laminate core section for distributing point loads across the panel;
a second core section bonded to the first core section and having a load bearing capacity less than the first core section;
laminated plies of material covering the first and second core sections; and,
a load transmitting link connected to the panel in the area of the first core section for supporting the panel.
7. The composite panel of claim 6, wherein:
the first core section includes laminated plies of composite material, and
the second section of the core includes honeycomb material.
8. The composite panel of claim 7, wherein the first and second core sections include abutting sides adhesively bonded to each other.
9. The composite panel of claim 6, wherein the laminated plies include doubler plies overlying the first core section.
10. The composite panel of claim 6, wherein the first core section is located in a medial region of the panel.
11. The composite panel of claim 6, wherein the first core section is generally circular in shape.
12. The composite panel of claim 6, wherein the first core section includes laminated plies of glass fiber reinforced resin.
13. The composite panel of claim 6, wherein the entire periphery of the first core section is surrounded by and bonded to the second core section.
14. The composite panel of claim 6, further comprising a third core section surrounding the second core section and having a load bearing capacity less than the second core section.
15. The composite panel of claim 6, further comprising attachment means passing through the first core section for attaching the link to the panel.
16. An airplane fairing, comprising:
at least one panel including inner and outer laminated plies of composite material and a core sandwiched between the inner and outer laminated plies,
the core including a section of increased density located in a medial region of the panel.
17. The airplane fairing of claim 16, wherein:
the section of increased density includes a solid plank, and
the core further includes a honeycomb section bonded to and surrounding the plank.
18. The airplane fairing of claim 16, further comprising:
a strut for supporting the panel: and
means for attaching the strut to the panel in the area of the core section having increased density.
19. The airplane fairing of claim 16, wherein:
the section of increased density includes laminated plies of composite material forming an essentially solid member, and
the core further includes a honeycomb section surrounding the solid member, the honeycomb section including first portion having a first density and bonded to the solid member, and a second portion having a second density less than the first density, the second portion surrounding and being bonded to the first portion.
20. A method of fabricating a composite panel for an aerospace vehicle, comprising:
making a plank;
forming a core by positioning the plank in a layer of honeycomb and bonding the honeycomb layer to the plank;
forming a layup by placing layers of composite material on opposite sides of the core;
compacting the layup; and,
curing the layup.
21. The method of claim 20, wherein making the plank includes laminating plies of fiber reinforced resin.
22. The method of claim 20, wherein bonding the honeycomb layer to the plank includes introducing an adhesive foam between the sides of the honeycomb layer and the sides of the plank.
23. The method of claim 20, further comprising:
installing a strut attachment on the panel in the area of the plank.
24. The method of claim 20, wherein positioning the plank within the honeycomb layer includes:
forming a cut-out in the honeycomb layer matching the shape of the plank, and
placing the plank inside the cut-out, and
bonding the sides of the plank to the sides of the honeycomb layer.
25. A composite panel for an aerospace vehicle fabricated by the method of claim 20.