1. An apparatus for using one or more digital to analog converters (DACs) to optimize power efficiency of a switching power amplifier through zero-voltage switching, comprising:
a digital engine configured to receive a baseband signal input, up convert the baseband signal using a digital up converter in the digital engine, and output a radio frequency (RF) digital output for driving an input of a DAC; and
a DAC configured to receive the RF digital output from the digital engine to generate a digitally controlled current output having a switching waveform, wherein the digitally controlled current output is connected to an emitter of a driving transistor of the switching power amplifier to provide zero-voltage switching for the switching power amplifier.
2. The apparatus of claim 1, wherein the switching waveform comprises uniformly spaced current pulses having various magnitudes, wherein the uniformly spaced current pulses comprises:
pulses having a magnitude according to a pulse shape when the switching power amplifier is turned on and a voltage across the driving transistor is at a minimal level; and
pulses having little to no magnitude when the switching power amplifier is turned off.
3. The apparatus of claim 1, wherein:
the power amplifier comprises a cascode stage in a common base configuration using high breakdown voltage compound semiconductor materials; and
the digitally controlled current output has a current on the order of hundreds of milliamps.
4. The apparatus of claim 1, wherein the switching power amplifier includes an amplifier having a class E or F configuration.
5. The apparatus of claim 1, further comprising:
one or more resonator output filters associated with a class F operation, wherein a voltage waveform at the collector approaches a square waveform to reduce additional power dissipation.
6. The apparatus of claim 1, wherein the DAC comprises switch arrays, and output impedance control of switches in the switch arrays controls the magnitudes of the digitally controlled current output.
7. The apparatus of claim 1, wherein the DAC comprises resistor arrays configurable to provide varying magnitudes of the digitally controlled current output based on the digital output of the digital engine.
8. The apparatus of claim 1, wherein the DAC drives the switching power amplifier using the digitally controlled current output in the absence of a current to voltage conversion stage.
9. The apparatus of claim 1, further comprising a base voltage generator to provide a base voltage for the driving transistor having a voltage waveform, wherein the base voltage generator comprises:
a replica circuit connected to the digitally controlled current output of the DAC, for mirroring the digitally controlled current output; and
a voltage regulator, connected to the output of the replica circuit, for generating a base voltage according to the voltage waveform based on the output of the replica circuit.
10. The apparatus of claim 1, further comprising a base voltage generator to provide a base voltage having a voltage waveform, wherein the base voltage generator comprises:
a digital signal processor connected the RF digital output of the digital engine for processing the RF digital output to generate voltage information according to the voltage waveform at the output of the digital signal processor; and
a voltage generator, connected to the output of the digital signal processor, for generating the base voltage based on the voltage information.
11. The apparatus of claim 1, wherein the digital engine comprises: the digital up converter, a digital pre-distorter, and a pulse shaper.
12. The apparatus of claim 1, wherein the digital engine comprises:
a plurality of digital up converters, each of the digital up conversion blocks for mixing individual carriers at different frequencies to generate digital intermediate frequencies.
13. The apparatus of claim 12, wherein the digital engine further comprises:
a summation node for summing the digital intermediate frequencies to generate a multi-carrier signal.
14. The apparatus of claim 13, wherein the digital engine further comprises:
a digital pre-distorter taking the multi-carrier signal as input for generating a pre-distorted signal; and
a pulse shaper taking pre-distorted signal as input to generate the RF digital output of the digital engine.
15. A method for using one or more digital to analog converters (DACs) to optimize power efficiency of the switching power amplifier through zero-voltage switching, comprising:
processing a baseband signal as input by a digital engine;
up converting, by a digital up converter in the digital engine, the baseband signal in the digital domain;
outputting a radio frequency (RF) digital output of the digital engine to drive an input of the DAC;
outputting, by the DAC, a digitally controlled current output having a switching waveform based on the RF digital output of the digital engine; and
driving the switching power amplifier directly with the digitally controlled current output of the DAC, wherein the digitally controlled current output of the DAC is connected to an emitter of a driving transistor of the switching power amplifier to provide zero-voltage switching for the switching power amplifier.
16. The method of claim 15, wherein:
the switching waveform comprises uniformly spaced current pulses having various magnitudes;
outputting, by the DAC, the digitally controlled current output comprises:
outputting pulses having a magnitude according to a pulse shape when the switching power amplifier is turned on and a voltage across the driving transistor is at a minimal level; and
outputting pulses having little to no magnitude when the switching power amplifier is turned off.
17. The method of claim 15, wherein outputting, by the DAC, the digitally controlled current output comprises outputting a current on the order of hundreds of milliamps to the power amplifier comprising a cascode stage in a common base configuration using high breakdown voltage compound semiconductor materials.
18. The method of claim 15, wherein driving the switching power amplifier directly with the digitally controlled current output comprises driving the switching power amplifier using the digitally controlled current output in the absence of a current to voltage conversion stage.
19. A radio frequency transmitter system for driving an antenna, said antenna configured to transmitting radio frequency signals, comprising:
a switching power amplifier for producing the radio frequency (RF) signals to be transmitted by the antenna;
a digital engine configured to receive a baseband signal input, up convert the baseband signal using a digital up converter in the digital engine, and output a RF digital output for driving an input of a DAC; and
the digital to analog converter (DAC) configured to receive the RF digital output to generate a digitally controlled current output having a switching waveform, wherein the digitally controlled current output drives an emitter of a driving transistor of the switching power amplifier to provide zero-voltage switching for the switching power amplifier.
20. The radio frequency transmitter system of claim 19, wherein the digital engine comprises:
a plurality of digital up converters, each of the digital up conversion blocks for mixing individual carriers at different frequencies to generate digital intermediate frequencies;
a summation node for summing the digital intermediate frequencies to generate a multi-carrier signal;
a digital pre-distorter taking the multi-carrier signal as input for generating a pre-distorted signal; and
a pulse shaper taking pre-distorted signal as input to generate the RF digital output of the digital engine.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A golf ball comprising a core, an intermediate layer and a cover, wherein the intermediate layer has a thickness ranging from 0.020 inch to 0.060 inch, wherein the cover is molded from thermoplastic material comprising a polyurethane, polyurea or polyurethanepolyurea composition having a melt index of 15 g10 min or more at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg prior to molding, and wherein the cover is treated with a secondary curing agent comprising an isocyanate subsequent to molding.
2. The golf ball of claim 1, wherein the cover has a cross-sectional thickness of 0.075 or less.
3. The golf ball of claim 1, wherein the cover has a cross-sectional thickness of 0.050 or less.
4. The golf ball of claim 1, wherein the cover has a cross-sectional thickness of 0.040 or less.
5. The golf ball of claim 1, wherein the cover has a cross-sectional thickness of 0.030 or less.
6. The golf ball of claim 1, wherein the melt index of the material is 20 g10 min or more at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg prior to molding.
7. The golf ball of claim 1, wherein the melt index of the material is 25 g10 min or more at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg prior to molding.
8. The golf ball of claim 1, wherein the melt index of the material is 30 g10 min or more at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg prior to molding.
9. The golf ball of claim 1, wherein the isocyanate is MDI.
10. A golf ball comprising a core, an intermediate layer and a cover, wherein the intermediate layer is composed of a material selected from the group consisting of ionomer, ionomer blends, thermoplastic polyurethanes, thermosetting polyurethanes, thermoplastic block polyamides, thermoplastic block polyesters, metallocene catalyzed polyolefins, polyamide and ionomer blends, metallocene catalyzed polyamides, and polyphenylene ether and ionomer blends, wherein the cover has a Shore D hardness of 60 or less and is molded from a thermoplastic material comprising a polyurethane, polyurea or polyurethanepolyurea composition having a flex modulus of 30,000 psi or less and a melt index of 15 g10 min or more at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg prior to molding, and wherein the cover is treated with a secondary curing agent comprising an isocyanate subsequent to molding.
11. The golf ball of claim 10, wherein the cover has a Shore D hardness of 55 or less.
12. The golf ball of claim 10, wherein the cover has a Shore D hardness of 50 or less.
13. The golf ball of claim 10, wherein the cover has a Shore D hardness of 45 or less.
14. The golf ball of claim 10, wherein the cover additionally comprises an ionomer or non-ionomer material.
15. The golf ball of claim 10, wherein the melt index of the material is 20 g10 min or more at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg prior to molding.
16. The golf ball of claim 10, wherein the melt index of the material is 25 g10 min or more at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg prior to molding.
17. The golf ball of claim 10, wherein the melt index of the material is 30 g10 min or more at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg prior to molding.
18. The golf ball of claim 10, wherein the flex modulus of the material is 20,000 psi or less.
19. The golf ball of claim 10, wherein the flex modulus of the material is 15,000 psi or less.
20. The golf ball of claim 10, wherein the flex modulus of the material is 10,000 psi or less.
21. A golf ball comprising:
a core;
an intermediate layer having a thickness ranging from 0.020 inch to 0.060 inch, the intermediate layer formed on the core;
a cover molded on said intermediate layer and said core, said cover formed from a polymeric cover composition that includes a polyurethane, said cover composition having a melt index prior to molding said cover of from about 15 to about 85 grams per 10 minutes at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg, and wherein the cover is treated by the application of an isocyanate subsequent to molding.
22. The golf ball of claim 21, wherein said polyurethane in said cover composition has a melt index of from about 25 to about 50 grams per 10 minutes at a temperature of 200\xb0 C. to 210\xb0 C. and a load of 8.7 kg.