1. An apparatus for substantially planarizing a plurality of outer surfaces of an array of solder bumps attached to a bumped device, comprising:
a planarization member engageable with at least some of the plurality of outer surfaces, the planarization member applying a planarization action on one or more of the plurality of outer surfaces to substantially planarize the solder bumps; and
a securing element engageable with the bumped device to securely position the bumped device during engagement of the planarization member with the outer surfaces.
2. The apparatus of claim 1, further comprising a planarization gauge engageable with at least a portion of the outer surfaces to assess a planarization condition of the solder bumps.
3. The apparatus of claim 1 wherein the planarization member includes a cutting tool and the planarization action comprises a milling action on the one or more outer surfaces.
4. The apparatus of claim 1 wherein the planarization member includes a heated platen and the planarization action comprises a thermo-mechanical deformation action on the one or more outer surfaces.
5. The apparatus of claim 1 wherein the planarization member includes an abrasive surface and the planarization action comprises a grinding action on the one or more outer surfaces.
6. The apparatus of claim 1 wherein the planarization member includes a chemical solution and the planarization action comprises a chemical reaction with the one or more outer surfaces.
7. The apparatus of claim 1 wherein the planarization member includes a solder deposition device and the planarization action comprises a solder deposition on the one or more outer surfaces.
8. The apparatus of claim 7, further comprising a contact member engageable with one or more of the solder bumps to determine a seating plane, the solder deposition device applying the solder deposition on the one or more outer surfaces until the outer surfaces are substantially planarized along the seating plane.
9. The apparatus of claim 1 wherein the securing element includes a retaining wall sized to define a receiving space for receiving the bumped device, further comprising a protective layer disposed within the receiving space and at least partially covering the solder bumps except for the one or more outer surfaces, and wherein the planarization member includes a reactive solution disposed within the receiving space on the protective layer, the planarization action comprising an etching of the one or more outer surfaces by the reactive solution.
10. The apparatus of claim 1 wherein the planarization member includes a reservoir of a reactive solution and the securing element securely positions the bumped device with the solder bumps projecting downwardly toward the reservoir, the planarization action comprising an etching of the one or more outer surfaces by the reactive solution when the one or more outer surfaces are brought into contact with the reactive solution.
11. The apparatus of claim 1 wherein the at least some outer surfaces engageable by the planarization member include the one or more outer surfaces upon which the planarization action is applied.
12. The apparatus of claim 1 wherein the securing element includes a retaining mass positioned on the bumped device and the planarization member includes a substantially flat surface positioned below the bumped device in contact with the at least some outer surfaces, the planarization action comprising a compressive force due to the weight of the retaining mass, the compressive force mechanically flattening the one or more outer surfaces.
13. The apparatus of claim 1, further comprising a load device engageable with at least one of the bumped device or the planarization member to urge the at least some outer surfaces of the bumped device into engagement with the planarization member.
14. The apparatus of claim 13 wherein the load device includes a fixed surface and a pressurizable vessel disposed between the fixed surface and the bumped device, a pressure in the pressurizable chamber urging the bumped device away from the fixed surface and into engagement with the planarization member.
15. The apparatus of claim 13 wherein the securing element includes a retaining clip engageable with a substrate of the bumped device and the planarization member includes a substantially flat surface in contact with the at least some outer surfaces, the load device including a centrifuge engageable with the planarization member, the planarization action comprising a centrifugal force that compresses and mechanically flattens the one or more outer surfaces against the flat surface.
16. An apparatus for approximately planarizing a plurality of solder bumps, comprising:
a planarization member engageable with at least some of the plurality of solder bumps to apply a planarization action on one or more of the plurality of solder bumps to approximately equalize the heights of the solder bumps on a bumped device; and
a securing element engageable with the bumped device to securely position the bumped device during engagement of the planarization member with the solder bumps.
17. The apparatus of claim 16, further comprising a planarization gauge engageable with at least a portion of the solder bumps to assess a planarization condition of the solder bumps.
18. The apparatus of claim 16, further comprising a load device engageable with at least one of the planarization member or the bumped device to urge the at least some solder bumps into engagement with the planarization member.
19. A method of substantially planarizing an array of solder bumps attached to a bumped device, comprising:
securely positioning the array of solder bumps proximate a planarization member;
engaging the planarization member with at least some of a plurality of outer surfaces of the solder bumps; and
applying a planarization action with the planarization member to one or more of the outer surfaces to substantially planarize the array of solder bumps.
20. The method of claim 19, further comprising sensing at least some of the plurality of outer surfaces to define a seating plane.
21. The method of claim 19, further comprising gauging a planarization condition of the array of solder bumps.
22. The method of claim 21 wherein gauging a planarization condition of the array of solder bumps comprises gauging the planarization condition of the array of solder bumps after engaging the planarization member with at least some of the plurality of outer surfaces of the solder bumps.
23. The method of claim 19 wherein the planarization member has a substantially flat surface and applying a planarization action with the planarization member to one or more of the outer surfaces comprises applying a compressive force with the substantially flat surface to mechanically flatten the one or more outer surfaces.
24. The method of claim 19 wherein the planarization member includes a heated platen and applying a planarization action with the planarization member to one or more of the outer surfaces comprises at least partially thermo-mechanically deforming the one or more outer surfaces with the heated platen.
25. The method of claim 19 wherein the planarization member includes a cutting tool and applying a planarization action with the planarization member to one or more of the outer surfaces comprises milling the one or more outer surfaces with the cutting tool.
26. The method of claim 19 wherein the planarization member includes a chemically reactive solution and applying a planarization action with the planarization member to one or more of the outer surfaces comprises dissolving the one or more outer surfaces with the chemically reactive solution.
27. The method of claim 19 wherein applying a planarization action with the planarization member to one or more of the outer surfaces comprises applying a planarization action with the planarization member to the at least some outer surfaces engaged with the planarization member.
28. The method of claim 19, further comprising engaging a load member with at least one of the bumped device or the planarization member to urge the at least some outer surfaces into engagement with the planarization member.
29. The method of claim 19, further comprising forming a protective layer at least partially surrounding the solder bumps.
30. A method of substantially planarizing an array of solder bumps attached to a bumped device, comprising adjusting the thickness of at least some of the solder bumps so that all of the solder bumps in the array project from the bumped device by substantially the same distance.
31. The method of claim 30, further comprising securing the position of the bumped device during engagement of the planarization member with the at least some solder bumps.
32. The method of claim 30, further comprising gauging a planarization condition of the array of solder bumps.
33. The method of claim 30 wherein adjusting the thickness of at least some of the solder bumps comprises milling the at least some solder bumps with a cutting tool.
34. The method of claim 30 wherein adjusting the thickness of at least some of the solder bumps comprises thermo-mechanically deforming the at least some solder bumps.
35. The method of claim 30 wherein adjusting the thickness of at least some of the solder bumps comprises grinding the at least some solder bumps with an abrasive.
36. The method of claim 30 wherein adjusting the thickness of at least some of the solder bumps comprises dissolving a portion of the at least some solder bumps with a chemical solution.
37. The method of claim 30 wherein adjusting the thickness of at least some of the solder bumps comprises mechanically flattening the at least some solder bumps.
38. The method of claim 30 wherein adjusting the thickness of at least some of the solder bumps comprises depositing a volume of solder on the at least some solder bumps.
39. A bumped device having an array of substantially planarized solder bumps created by a method comprising:
securely positioning the array of solder bumps proximate a planarization member;
engaging the planarization member with at least some of a plurality of outer surfaces of the solder bumps; and
applying a planarization action with the planarization member to one or more of the outer surfaces to substantially planarize the array of solder bumps.
40. The bumped device of claim 39 wherein the method further comprises gauging a planarization condition of the array of solder bumps.
41. The bumped device of claim 39 wherein applying a planarization action with the planarization member to one or more of the outer surfaces comprises milling the one or more outer surfaces with a cutting tool.
42. The bumped device of claim 39 wherein applying a planarization action with the planarization member to one or more of the outer surfaces comprises thermo-mechanically deforming the one or more outer surfaces with a heated tool.
43. The bumped device of claim 39 wherein applying a planarization action with the planarization member to one or more of the outer surfaces comprises grinding the one or more outer surfaces with an abrasive.
44. The bumped device of claim 39 wherein applying a planarization action with the planarization member to one or more of the outer surfaces comprises dissolving a portion of the one or more outer surfaces with a reactive solution.
45. The bumped device of claim 39 wherein applying a planarization action with the planarization member to one or more of the outer surfaces comprises mechanically flattening the one or more outer surfaces.
46. The bumped device of claim 39 wherein applying a planarization action with the planarization member to one or more of the outer surfaces comprises depositing a volume of solder on the one or more outer surfaces.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A coarse timing synchronization acquisition method in a mobile communication system, the synchronization acquisition method practiced with respect to a beginning time instant; the method comprising the following processing steps:
A, starting from the beginning time instant of timing synchronization acquisition, iteratively calculating delay correlation accumulation (DCA) values at K samples, where K is a number of delay correlation accumulation values at each time slot;
B, searching M time slots in each frame, in each time slot, a maximum DCA value defining a timing synchronization position estimate, M synchronization position estimates being obtained in each frame, and among these, one timing synchronization position estimate being selected as the candidate for the timing synchronization position of current frame, and deciding whether the candidate is reliable;
C, after L frames are searched, deriving a predicted value of a timing synchronization position of a next frame from the L previous timing synchronization positions; when reliable timing synchronization positions consecutively approach the predicted values of the timing synchronization position of the next frame, taking the timing synchronization position of the last frame as an acquired timing synchronization position.
2. The method according to claim 1, wherein, in said step C:
reliable timing synchronization positions consecutively approaching the predicted value of the timing synchronization position of the next frame comprises: timing synchronization positions of Lacq consecutive frames being reliable, and the difference between timing synchronization positions and the predicted value of the timing synchronization position of the next frame being less than or equal to Tacq; where, said Lacq is the minimum number of consecutive frames of reliable timing synchronization positions, said Tacqis the threshold for timing synchronization acquisition decision;
taking the timing synchronization position of the last frame as an acquired timing synchronization position comprises: the acquired timing synchronization position being the timing synchronization position of the last frame of the Lacq consecutive frames.
3. The method according to claim 2, wherein, in said step C, a predicted value of timing synchronization position of the next frame being obtained by using L timing synchronization positions comprises:
adopting a robust least-square linear fitting algorithm to predict the timing synchronization position of the (L+1)th frame, by utilizing said L timing synchronization positions.
4. The method according to claim 1 further characterized in that the method is applied in a mobile multimedia broadcast system.
5. The method according to claim 1, wherein,
said step A further comprises: computing a timing synchronization metric of delay correlation accumulation values;
in said step B: the position that corresponds to the maximum DCA value is defined as a position at which timing synchronization metric reaches the local peak in a time slot.
6. The method according to claim 5, wherein, said timing synchronization metric is a power P of the DCA values.
7. The method according to claim 6, wherein, in said step A, calculating the DCA value comprises:
calculating the initial value of DCA:
\u03b8
0
=
\u2211
k
=
0
N
–
1
\u2062
\u2062
r
\u2061
(
k
+
k
0
)
\u2062
r
*
\u2061
(
k
+
k
0
+
N
D
)
,
where, r(k) is a digital baseband received signal, N is a length of DCA, ND is a number of delayed samples of delay correlation, k0 is a beginning time instant of timing synchronization acquisition, and r*(\u2022) denotes a complex conjugate operation;
based on the initial value of DCA, starting from the beginning time instant of timing synchronization acquisition, a DCA value at each sample being computed iteratively:
\u03b8i=\u03b8i\u22121+r(k0+i+N\u22121)r*(k0+i+ND+N\u22121)\u2212r(k0+i\u22121)r*(k0+i+ND\u22121),
where, i=1, 2, 3, . . . K.
8. The method according to claim 5, wherein,
said step B further comprises: outputting a reliability indicator of timing synchronization position of current frame; said reliability indicator being used to signify whether timing synchronization position of current frame is reliable;
in said step C, all timing synchronization position of Lacq consecutive frames being reliable comprises: reliability indicator of all the Lacq consecutive frames showing that timing synchronization positions of current frames are reliable.
9. The method according to claim 8, wherein, in said step B, timing synchronization position and reliability indicator are obtained according to the following formula:
timing synchronization position of current frame being:
U
=
argmax
k
\u2062
{
P
V
k
}
,
where
,
k
=
0
,
1
,
\u2026
\u2062
,
M
–
1
,
Vk is an estimated timing synchronization position in a time slot, namely, U is an estimate of timing synchronization position corresponding to the maximum peak among M local peaks;
a reliability indicator of timing synchronization position of current frame being
f
=
{
1
,
P
U
\u2265
T
dec
0
,
P
U
<
T
dec
\u2062
,
where, Tdec is the threshold for timing synchronization reliability decision.
10. The method according to claim 9, wherein, in said step A, calculating the DCA value comprises:
calculating the initial value of DCA:
\u03b8
0
=
\u2211
k
=
0
N
–
1
\u2062
\u2062
r
\u2061
(
k
+
k
0
)
\u2062
r
*
\u2061
(
k
+
k
0
+
N
D
)
,
where, r(k) is a digital baseband received signal, N is a length of DCA, ND is a number of delayed samples of delay correlation, k0 is a beginning time instant of timing synchronization acquisition, and r*(\u2022) denotes a complex conjugate operation;
based on the initial value of DCA, starting from the beginning time instant of timing synchronization acquisition, a DCA value at each sample being computed iteratively:
\u03b8i=\u03b8i\u22121+r(k0+i+N\u22121)r*(k0+i+ND+N\u22121)\u2212r(k0+i\u22121)r*(k0+i+ND\u22121),
where, i=1, 2, 3, . . . K.
11. The method according to claim 9, wherein, in said step C, a predicted value of timing synchronization position of the next frame being obtained by using L timing synchronization positions comprises:
adopting a robust least-square linear fitting algorithm to predict the timing synchronization position of the (L+1)th frame, by utilizing said L timing synchronization positions.
12. The method according to claim 8, wherein, in said step B, timing synchronization position and reliability indicator are obtained according to the following formula:
a timing synchronization position of a current frame being:
U=V\u2514M2\u2518;
a reliability indicator of timing synchronization position of current frame being:
f
=
{
1
,
max
\u2061
(
V
k
+
1
–
V
k
)
\u2264
T
dec
0
,
max
\u2061
(
V
k
+
1
–
V
k
)
>
T
dec
,
\u2200
k
;
wherein, local peak positions are normalized; Tdec is the threshold for timing synchronization reliability decision, V is a timing synchronization position estimate, and max(\u2022) is a \u201cmaximum\u201d operand.
13. The method according to claim 12, wherein, in said step C, a predicted value of timing synchronization position of the next frame being obtained by using L timing synchronization positions comprises:
adopting a robust least-square linear fitting algorithm to predict the timing synchronization position of the (L+1)th frame, by utilizing said L timing synchronization positions.
14. The method according to claim 8, wherein, in said step A, calculating the DCA value comprises:
calculating the initial value of DCA:
\u03b8
0
=
\u2211
k
=
0
N
–
1
\u2062
\u2062
r
\u2061
(
k
+
k
0
)
\u2062
r
*
\u2061
(
k
+
k
0
+
N
D
)
,
where, r(k) is a digital baseband received signal, N is a length of DCA, ND is a number of delayed samples of delay correlation, k0 is a beginning time instant of timing synchronization acquisition, and r*(\u2022) denotes a complex conjugate operation;
based on the initial value of DCA, starting from the beginning time instant of timing synchronization acquisition, a DCA value at each sample being computed iteratively:
\u03b8i=\u03b8i\u22121+r(k0+i+N\u22121)r*(k0+i+ND+N\u22121)\u2212r(k0+i\u22121)r*(k0+i+ND\u22121),
where, i=1, 2, 3, . . . K.
15. The method according to claim 8, wherein, in said step C, a predicted value of timing synchronization position of the next frame being obtained by using L timing synchronization positions comprises:
adopting a robust least-square linear fitting algorithm to predict the timing synchronization position of the (L+1)th frame, by utilizing said L timing synchronization positions.
16. The method according to claim 5, wherein,
a correlation envelope detection algorithm or maximum correlation value detection algorithm is adopted in said step B to search for a local peak of each frame and the corresponding timing synchronization position estimate.
17. The method according to claim 16, wherein, in said step A, calculating the DCA value comprises:
calculating the initial value of DCA:
\u03b8
0
=
\u2211
k
=
0
N
–
1
\u2062
r
\u2061
(
k
+
k
0
)
\u2062
r
*
\u2061
(
k
+
k
0
+
N
D
)
,
where, r(k) is a digital baseband received signal, N is a length of DCA, ND is a number of delayed samples of delay correlation, k0 is a beginning time instant of timing synchronization acquisition, and r*(\u2022)denotes a complex conjugate operation;
based on the initial value of DCA, starting from the beginning time instant of timing synchronization acquisition, a DCA value at each sample being computed iteratively:
\u03b8i=\u03b8i\u22121+r(k0+i+N\u22121)r*(k0+i+ND+N\u22121)\u2212r(k0+i\u22121)r*(k0+i+ND\u22121),
where, i=1, 2, 3, . . . K.
18. The method according to claim 5, wherein, in said step A, calculating the DCA value comprises:
calculating the initial value of DCA:
\u03b8
0
=
\u2211
k
=
0
N
–
1
\u2062
\u2062
r
\u2061
(
k
+
k
0
)
\u2062
r
*
\u2061
(
k
+
k
0
+
N
D
)
,
where, r(k) is a digital baseband received signal, N is a length of DCA, ND is a number of delayed samples of delay correlation, k0 is a beginning time instant of timing synchronization acquisition, and r*(\u2022) denotes a complex conjugate operation;
based on the initial value of DCA, starting from the beginning time instant of timing synchronization acquisition, a DCA value at each sample being computed iteratively:
\u03b8i=\u03b8i\u22121+r(k0+i+N\u22121)r*(k0+i+ND+N\u22121)\u2212r(k0+i\u22121)r*(k0+i+ND\u22121),
where, i=1, 2, 3, . . . K.
19. The method according to claim 1, wherein, in said step A, calculating the DCA value comprises:
calculating the initial value of DCA:
\u03b8
0
=
\u2211
k
=
0
N
–
1
\u2062
\u2062
r
\u2061
(
k
+
k
0
)
\u2062
r
*
\u2061
(
k
+
k
0
+
N
D
)
,
where, r(k) is a digital baseband received signal, N is a length of DCA, ND is a number of delayed samples of delay correlation, k0 is a beginning time instant of timing synchronization acquisition, and r*(\u2022) denotes a complex conjugate operation;
based on the initial value of DCA, starting from the beginning time instant of timing synchronization acquisition, a DCA value at each sample being computed iteratively:
\u03b8i=\u03b8i\u22121+r(k0+i+N\u22121)r*(k0+i+ND+N\u22121)\u2212r(k0+i\u22121)r*(k0+i+ND\u22121),
where, i=1, 2, 3, . . . K.
20. The method according to claim 1, wherein, in said step C, a predicted value of timing synchronization position of the next frame being obtained by using L timing synchronization positions comprises:
adopting a robust least-square linear fitting algorithm to predict the timing synchronization position of the (L+1)th frame, by utilizing said L timing synchronization positions.