1461100442-82235365-d140-44d6-99dc-9bb9e3f1ebaa

1. A robust micromachined thermal mass flow sensor comprising: a suspending polyimide membrane with double side passivation layers on both top and bottom surfaces of the polyimide membrane which is suspended on a silicon substrate;
a heating element thermistor being connected to a microcontroller circuit with an ambient temperature sensing thermistor;
a temperature sensing thermistor being disposed on upstream flow side of the heating element thermistor with an open slot on the suspending polyimide membrane;
a temperature sensing thermistor being disposed on downstream flow side of the heating element thermistor with an open slot on the suspending membrane;
wherein the passivation layer on the bottom surface of the polyimide layer contains silicon nitride;
wherein the ambient temperature sensing thermistor being disposed in a region of no polyimide layer on the silicon substrate; and
wherein the open slots on the suspending polyimide membrane between the heating element thermistor and the temperature sensing thermistors isolates transverse heat conduction from the heating element thermistor to the temperature sensing thermistors.
2. The robust micromachined thermal mass flow sensor of claim 1 wherein:
the open slots on the suspending polyimide membrane are disposed in the direction perpendicular to the flow direction wherein the dimension of the open slots are 20 to 40 um wide and 400 to 600 um long.
3. The robust micromachined thermal mass flow sensor of claim 1 wherein:
the open slots are utilized to balance the pressure difference between flow passage above the suspending membrane and a cavity underneath the suspending membrane, which could increase stability and endurance of the polyimide membrane and enhance sensor accuracy under high pressure operation.
4. The robust micromachined thermal mass flow sensor of claim 1 wherein:
the ambient temperature sensing thermistor is positioned on an upstream location related to the heating element thermistor;
wherein the ambient temperature sensing thermistor is at least 500 um away from the heating element thermistor to reduce heating effects from the heating element thermistor.
5. The robust micromachined thermal mass flow sensor of claim 1 wherein: a silicon dioxide layer is applied as an adhesion enhancement layer to improve the long term reliability and the adhesion between the passivation layer and the polyimide layer membrane.
6. The robust micromachined thermal mass flow sensor of claim 5 wherein:
the thickness of the dielectric silicon dioxide layer is from 500 A to 1000 A; the thickness of the dielectric silicon nitride layer is from 3000 A to 5000 A.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for atom probe tomography (APT) sample preparation from a three-dimensional (3D) field effect transistor device formed within a semiconductor structure, the method comprising:
identifying, based on a measured capacitance-voltage (C-V) characteristic, a defect associated with a Fin structure corresponding to the 3D field effect transistor device;
detaching, using a nanomanipulator, the Fin structure from the 3D field effect transistor device based on the measured capacitance-voltage (C-V) characteristic identifying the defect associated with the 3D field effect transistor device; and
welding the detached Fin having the identified defect to the nanomanipulator probe tip using an incident focused ion beam.
2. The method of claim 1, further comprising:
applying the incident focused ion beam having a voltage of less than about 1000 eV to a tip of the Fin that is welded to the nanomanipulator probe tip, wherein the tip of the Fin is sharpened by the focused ion beam; and
applying an atomic probe tomography measurement on the Fin that is sharpened by the focused ion beam.
3. The method of claim 2, wherein the tip of the Fin is sharpened to a diameter in the range of about 20 nm-100 nm.
4. The method of claim 1, wherein the measuring of the capacitance-voltage (C-V) characteristic for the 3D field effect transistor device comprises:
exposing first and second contact regions associated with the 3D field effect transistor device;
coupling a high-frequency impedance probe having a frequency range of about 5 Mhz to about 110 Mhz to an impedance analyzer;
coupling the high-frequency impedance probe to a first and a second atomic force probe tip;
coupling, using an atomic force microscope, the first atomic force probe tip to the exposed first contact region;
coupling, using the atomic force microscope, the second atomic force probe tip to the exposed second contact region; and
measuring the C-V characteristic for the 3D field effect transistor device on the impedance analyzer, the impedance analyzer applying an operating frequency corresponding to the frequency range of about 5 Mhz to about 110 Mhz to the first and second contact regions of the 3D field effect transistor device using the high-frequency impedance probe.
5. The method of claim 4, further comprising:
an XYZ manipulation stage that holds the high-frequency impedance probe, the XYZ manipulation stage manipulating the XYZ position of the high-frequency impedance probe for optimizing the measured C-V characteristic for the 3D field effect transistor device by controlling both a first physical tension associated with a first electrical conductor coupled to a ground connection of the high-frequency impedance, and a second physical tension associated with a second electrical conductor coupled to a signal conductor of the high-frequency impedance probe.
6. The method of claim 4, wherein the exposing of the first and second contact regions comprises:
applying a voltage in the range of about 50 eV to less than 300 eV to an inductively coupled Argon ion source operating at a radio frequency;
generating, from the Argon ion source, a collimated ion beam incident on a surface corresponding to the first and second contact regions for planar removal of layers of the surface; and
exposing the first and second contact regions underlying the surface using an end-point detector based on the planar removal of the layers.
7. The method of claim 6, wherein the generated collimated ion beam is incident on the surface of the semiconductor structure at an angle of about 3-12 degrees.
8. The method of claim 6, wherein the radio frequency (RF) comprises a 1.4 MHz signal.
9. The method of claim 6, wherein the end-point detector comprises a secondary ion mass spectroscopy (SIMS) detector.
10. The method of claim 6, wherein the planar removal of layers comprises removing layers of silicon nitride using etch selective hexafluoroethane (C2F6) gas.
11. The method of claim 6, wherein the planar removal of layers comprises removing layers of silicon oxide using etch selective tetrafluoromethane (CF4) gas.
12. The method of claim 6, wherein the planar removal of layers comprises removing layers of copper metallization.
13. The method of claim 6, wherein the exposed first and second contact regions comprises tungsten studs coupled to the 3D field effect transistor device.
14. The method of claim 1, wherein the C-V measurement is utilized to determine doping concentration in the Fin structure.
15. The method of claim 4, wherein the high-frequency impedance probe is coupled to a first and a second electrical conductor, the first electrical conductor coupled to the ground connection of the high-frequency impedance probe and the second electrical conductor coupled to the signal conductor of the high-frequency impedance probe.
16. The method of claim 15, wherein the first electrical conductor is coupled to the first atomic force probe tip and the second electrical conductor is coupled to the second atomic force probe tip.
17. A method for atom probe tomography (APT) sample preparation from a three-dimensional (3D) field effect transistor device formed within a semiconductor structure, the method comprising:
applying a voltage in the range of about 50 eV to less than 300 eV to an inductively coupled Argon ion source operating at a radio frequency;
generating, from the Argon ion source, a collimated ion beam incident on a crystalline surface of the semiconductor structure for planar removal of layers of the crystalline surface;
exposing first and second contact regions underlying the crystalline surface associated with the 3D field effect transistor device based on the planar removal of the layers;
coupling a high-frequency impedance probe to an impedance analyzer;
coupling the high-frequency impedance probe to a first and a second atomic force probe tip;
coupling the first atomic force probe tip to the exposed first contact region;
coupling the second atomic force probe tip to the exposed second contact region;
measuring the C-V characteristic for the 3D field effect transistor device on the impedance analyzer, the impedance analyzer applying an operating frequency to the first and second contact regions associated with the 3D field effect transistor device using the high-frequency impedance probe; and
detaching, based on the measured C-V characteristic, a Fin structure from the 3D field effect transistor device.
18. The method of claim 17, wherein the incident focused ion beam is generated by an inductively coupled Gallium ion source having a voltage in the range of about 500 eV-1000 eV.
19. A method for atom probe tomography (APT) sample preparation from a three-dimensional (3D) field effect transistor device formed within a semiconductor structure, the method comprising:
identifying, based on a capacitance-voltage (C-V) characteristic measurement, a defect associated with a Fin structure corresponding to the 3D field effect transistor device;
removing a hardmask layer from a top surface of the Fin structure using a collimated ion beam generated by applying a voltage in the range of about 50 eV to less than 300 eV to an inductively coupled Argon ion source operating at a radio frequency;
applying a metallic coating to the Fin structure having the identified defect;
detaching the coated Fin structure having the identified defect from the 3D field effect transistor device using a nanomanipulator probe tip;
welding the detached coated Fin having the identified defect to the nanomanipulator probe tip using an incident focused ion beam; and
applying the incident focused ion beam to a tip of the Fin that is welded to nanomanipulator probe tip.
20. The method of claim 19, wherein the metallic coating comprises a thickness of about 10 nm-30 nm.