1. A brimless lined elastic head covering worn by a user with a head, comprising:
a center panel with two sides;
a pair of side panels with one side panel attached to each side of the center panel forming an outer shell with a perimeter, an inner surface and a back side;
a brim band with two ends that is attached around the perimeter of the outer shell;
a liner that is shaped and dimensioned to mate with the inner surface of the outer shell;
a rectangular cut out on the back side of the outer shell to accommodate a user’s ponytail; and
an elastic band that is attached to each end of the brim band that is disposed across the bottom of the rectangular cut out allowing for expansion and contraction.
2. The head covering according to claim 1, wherein the center panel is trapezoidal.
3. The head covering according to claim 1, wherein the pair of side panels are mirror images of each other.
4. The head covering according to claim 1, wherein the pair of side panels are almond-shaped.
5. The head covering according to claim 1, wherein a liner is sewn inside of the outer shell as a layer between the user’s head and the outer shell, when worn by the user.
6. The head covering according to claim 1, wherein the elastic band is disposed inside of a fabric sleeve.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for fabricating a microelectronic package comprising:
obtaining a substrate;
mounting a circuit chip on the substrate;
proving a heat spreaderlid on the circuit chip,
wherein the heat spreaderlid has an underside surface comprising at least one curvilinear contour;
and applying a thermal interface material (TIM) between the circuit chip and the heat spreaderlid;
wherein the curvilinear contour comprises one positive or protruding curvilinear feature, and one negative or recessed curvilinear feature,
wherein the positive or protruding curvilinear feature aligns with low stress regions in the TIM between the heat spreaderlid and circuit chip, and results in an increase in heat dissipation, and
wherein the negative or recessed curvilinear feature aligns with a high stress region in the TIM between the heat spreaderlid and circuit chip, and results in a reduction in mechanical stress.
2. The process according to claim 1, wherein the contour comprises one positive or protruding curvilinear feature, and two negative or recessed curvilinear features.
3. The process according to claim 1, wherein the contour comprises two positive or protruding curvilinear features, and one negative or recessed curvilinear feature.
4. The process according to claim 1, wherein the increase in heat dissipation is 35%.
5. The process according to claim 1, wherein the reduction in mechanical stress is 80%.
6. The process according to claim 1, wherein the at least one positive or protruding curvilinear feature is located, starting 10 to 25% in from an edge of the circuit chip, and further extending inboard up to 25% of a dimension of the chip.
7. The process according to claim 6, wherein the starting location is inboard 20% from the chip edge.
8. The process according to claim 6, wherein the positive or protruding curvilinear feature has a height up to 80% of the TIM thickness.
9. The process according to claim 1, wherein the at least one negative or recessed curvilinear feature is located, starting from an edge of the chip, inboard up to 15% of a dimension of the chip.
10. The process according to claim 9, wherein the negative or recessed curvilinear feature has a height less than or equal to 100% of the thickness of the TIM.
11. The process according to claim 9, wherein the negative or recessed curvilinear feature has a width of up to 15% of a dimension of the chip.
12. The process according to claim 1, wherein the microelectronic package is a flip chip microelectronic package or a flip chip plastic ball grid array (FCPBGA) package.
13. A heat spreaderlid for a microelectronic package, wherein the heat spreader has an underside surface comprising a plurality of curvilinear contours,
wherein the curvilinear contour comprises at least one positive or protruding curvilinear feature, and at least one one negative or recessed curvilinear feature.
14. The heat spreaderlid to claim 13, wherein the contour comprises one positive or protruding curvilinear feature, and two negative or recessed curvilinear features.
15. The heat spreaderlid according to claim 13, wherein the contour comprises two positive or protruding curvilinear features, and one negative or recessed curvilinear feature.
16. The heat spreaderlid to claim 13, wherein the microelectronic package is a flip chip microelectronic package or a flip chip plastic ball grid array (FCPBGA) package.