1. A tire comprising at least one carcass-type reinforcement structure, formed of reinforcement elements, which is anchored on either side of the tire to a bead the base of which is intended to be mounted on a rim seat, each bead being extended radially towards the outside by a sidewall, the sidewalls joining radially towards the outside a tread, the beads, the sidewalls and the tread being formed in part of rubber compounds, wherein the tire comprises at least one device for measuring the internal temperature of a rubber compound of the tread and wherein said device is fixed within the rubber compound of the tread.
2. A tire according to claim 1, wherein the device emits a signal which conveys the temperature of the point of fastening of said system.
3. A tire according to claim 1, wherein the device is a wireless temperature sensor which can for example be queried by radio waves.
4. A tire according to claim 1, wherein the device is connected to a rotary hub for transmitting a signal which conveys the temperature of the point of fastening of said device.
5. A tire according to claim 1, wherein the tire comprises at least three devices for measuring the internal temperature of the rubber compound of the tread.
6. The use of a tire as described according to claim 1, for a two-wheeled motor-driven vehicle such as a motorcycle.
7. A method of estimating the grip properties of a tire, comprising measuring the internal temperature of the tread with at least one temperature measuring device fastened within the rubber compound of the tread of said tire.
8. A method for estimating grip properties of a tire comprising the steps of providing at least one temperature measuring device fastened and fastening the device within the rubber compound of the tread of the tire.
9. A driving assistance method for a vehicle comprising tirewheel mounted assemblies, wherein the tires incorporate at least one device fixed within the rubber compound of the tread and measuring the internal temperature of said rubber compound of the tread wherein a signal which conveys the temperature of the point of fastening of said device is transmitted to an implementing device and wherein the implementing device informs the driver andor regulates the power andor the torque andor the speed of the vehicle.
10. A driving assistance method for a vehicle according to claim 9, wherein the signal which conveys the temperature of the point of fastening of said system is transmitted by a wireless temperature sensor which can for example be queried by radio waves and is associated with a radio antenna within the rubber compound and a radio antenna on the vehicle.
11. A driving assistance method for a vehicle according to claim 9, wherein the signal which conveys the temperature of the point of fastening of said system is transmitted by connection by means of a rotary hub.
12. A driving assistance method for a vehicle according to claim 9, wherein the temperature measurement, the transmission of the signal and the information andor regulation are effected before the vehicle begins traveling.
13. A driving assistance method for a vehicle according to claim 9, wherein the temperature measurement, the transmission of the signal and the information andor regulation are effected while the vehicle is traveling.
14. A driving assistance method for a vehicle according to claim 9, wherein the implementing device receives a measurement of the temperature of the outer surface of the tire and preferably a measurement of the temperature of the contact surface of the tire with the ground.
15. A method for assisting with the driving of a vehicle comprising the steps of providing at least one temperature measurement system, and positioning the system within the rubber material constituting the tread of a tire fitted on the vehicle such that the measurement system is fixed within the rubber compound of the tread.
16. The method according to claim 15, wherein the system is actuated before the vehicle begins traveling.
17. The method according to claim 15, wherein the system is actuated while the vehicle is traveling.
18. The method according to claim 15, wherein the vehicle is a two-wheeled motor-driven vehicle.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A transistor comprising:
a semiconductor material base;
a semiconductor material mesa upstanding from said base;
a first silicide on an upper surface of said mesa;
a second silicide supported on said base at least at a first side of said mesa for supplying an electrical connection to said mesa;
first and second regions respectively coupled to the first and second silicide, the first and second regions being doped to a first type and one or more channel regions between the first and second regions being doped to a second type; and
a first mesa sidewall gate structure provided on said first side of said mesa and comprising a gate insulator material and an overlying gate conductor, said first gate structure being operative to control current flow in said channel regions between said first and second silicides through said mesa.
2. A transistor as in claim 1, wherein said gate insulator is a gate oxide.
3. A transistor as in claim 1, wherein said gate conductor comprises polysilicon.
4. A transistor as in claim 1, further comprising:
a third silicide supported on said base at a second side of said mesa opposite said first side; and
a second mesa sidewall gate structure provided on said second side of said mesa and comprising a gate insulator material and an overlying gate conductor, said second gate structure being operative to control with said first gate structure current flow between said first and second and first and third suicides through said mesa.
5. A transistor as in claim 1, further comprising a plurality of operative electrical devices respectively connected to each of said first silicides.
6. A transistor as in claim 1, wherein said mesa comprises silicon.
7. A transistor as in claim 1, wherein said mesa is formed of a material selected from the group consisting of Si, Ge, SiC, GaN, GaAs, InP, carbon nanotube and graphene.
8. A transistor comprising:
a semiconductor material base;
at least one linearly extending semiconductor mesa structure, upstanding from said base;
at least one first silicide material element extending along an upper level of each mesa structure in said linear direction;
a second silicide material element on said semiconductor material base at least at a first side of said at least one linear extending mesa structure for providing an electrical connection to said mesa structure; and
a first mesa sidewall gate structure provided on said first side of said mesa structure and comprising a gate insulator material and an overlying gate conductor, said first gate structure being operative to control current flow between said first and second silicide material elements through said mesa structure.
9. A transistor as in claim 8, wherein said at least one linearly extending mesa structure comprises a continuous linearly extending mesa and wherein said at least one first silicide element extends continuously along the upper surface of said continuously extending mesa structure.
10. A transistor as in claim 8, wherein said at least one linearly extending mesa structure comprises a plurality of discrete mesas and wherein said at least one first silicide element comprises a plurality of first silicide elements respectively provided on an upper surface of said plurality of discrete mesas.
11. A transistor as in claim 10, further comprising a plurality of linearly extending mesa structures, each comprising a plurality of discrete mesas spaced in a line,
wherein said at least one first silicide element comprises a plurality of first silicide elements respectively provided on an upper surface of each of said discrete mesas, and
wherein said first mesa sidewall gate structure comprises a plurality of continuous sidewall gate structures respectively provided for each line spanning the discrete mesas in a said line.
12. A transistor as in claim 10, wherein a second silicide material element is supported at and extends along a first side of each of said discrete mesas in a line.
13. A memory array comprising:
a semiconductor material base;
a plurality of linearly extending semiconductor mesas upstanding from said base, spaced from one another and arranged in parallel;
a plurality of first suicide elements respectively extending along an upper level of each of said mesas in said linear direction;
a plurality of second silicide elements respectively on said base at least at a first side of each mesa structure;
a plurality of first mesa sidewall gate structures respectively provided on said first side of each of said linearly extending mesa and each comprising a gate insulator material and an overlying gate conductor, first gate structures being operative to control current flow between said respective first and second silicide elements through said respective mesa structure;
a plurality of memory cells, each electrically coupled via a first side of said memory cell to one of said first silicide elements; and
a plurality of conductive lines arranged so that each of said memory cells is electrically coupled via a second side of said memory cell to one of said conductive lines so that no two memory cells are electrically coupled to the same first silicide element and the same conductive line.
14. The memory array as in claim 13, wherein more than one memory cell is coupled to the same first silicide element.
15. The memory array as in claim 14, wherein said second silicide element is supported and extends along said base at a first side of each of said plurality of linearly extending mesas.
16. The memory array as in claim 15, further comprising a second mesa sidewall gate respectively provided on a second side of each of said linearly extending mesas.
17. The memory array as in claim 16, wherein said second silicide material element is supported at and extends along a second side of said plurality of linearly extending mesas.
18. A memory array comprising:
a semiconductor material base;
a plurality of semiconductor mesa structures, upstanding from said base, spaced from one another within one or more lines of mesa structures;
a plurality of first silicide elements respectively extending along an upper level of each of said mesa structures;
a plurality of connected second silicide elements respectively supported on said semiconductor material base at least at a first side of each mesa structure for providing an electrical connection to said respective mesa structures;
a plurality of first mesa sidewall gate structures respectively provided on said first side of each of said mesas and extending linearly so that a gap between each of said mesa structures in a line is spanned by said gate structure, each gate structure comprising a gate insulator material and an overlying gate conductor, said first gate structures being operative to control current flow between said respective first and second silicide elements through said respective mesa structure;
a plurality of memory cells, each electrically coupled via a first side of said memory cell to a respective one of said first silicide elements; and
a plurality of conductive lines arranged so that each of said memory cells is electrically coupled via a second side to one of said conductive lines so that no two memory cells are electrically coupled to the same first silicide material element and the same conductive line.
19. A memory array as in claim 18, further comprising a plurality of second mesa sidewall gate structures, each respectively provided to span a second side of each of said mesa structures in a line.