What is claimed is:
1. An image reading apparatus for forming light from an original into an image on a solid-state image sensing element by using an imaging optical system, and reading image information of the original, characterized by comprising:
a first light source for emitting light of a visible region;
a second light source for emitting light of an invisible region;
a light guide plate which has said first and second light sources at an end face, guides incident light from the end face along a surface, and emits the incident light from the surface;
image information reading means for reading the image information recorded on the original on the basis of an image signal obtained by guiding, to the solid-state image sensing element, light from the original illuminated with light from said first light source that is guided by said light guide plate;
information reading means for reading second information present on an optical path extending from said light guide plate to the solid-state image sensing element on the basis of an image signal obtained by guiding, to the solid-state image sensing element, light from the original illuminated with light from said second light source that is guided by said light guide plate; and
correction means for removing the second information read by said information reading means from the image information read by said image information reading means.
2. The apparatus according to claim 1, characterized in that the second information includes information generated when dirt or a scratch present on the original itself shields light from said second light source that is guided by said light guide plate.
3. The apparatus according to claim 1, characterized in that said first and second light sources are parallel-arranged in a vertical direction along at least one side of said light guide plate.
4. The apparatus according to claim 1, characterized in that said first and second light sources are arranged along different sides of said light guide plate so as to be perpendicular to each other.
5. An image reading apparatus characterized by comprising:
a first light source for mainly emitting light of a visible region;
a second light source for mainly emitting light of an invisible region;
a light guide plate for guiding light emitted by said first and second light sources along a surface and illuminating an original; and
reading means for converting, into an image signal, transmitted light of the transparent original illuminated with light from said first or second light source that is guided by said light guide plate.
6. The apparatus according to claim 5, characterized in that defect information present on an optical path extending from said light guide plate to a solid-state image sensing element is read on the basis of an image signal obtained by guiding, to said reading means, the transmitted light of the transparent original illuminated with light from said second light source that is guided by said light guide plate.
7. The apparatus according to claim 6, characterized in that the defect information includes information generated when dirt or a scratch present on the transparent original itself shields light from said second light source that is guided by said light guide plate.
8. The apparatus according to claim 5, characterized in that said first and second light sources are parallel-arranged along at least one side of said light guide plate.
9. The apparatus according to claim 5, characterized in that said first and second light sources are arranged along different sides of said light guide plate.
10. The apparatus according to claim 5, characterized in that said second light source mainly emits light of an infrared region.
11. An illumination apparatus used in an image reading apparatus for forming light from an original into an image on a solid-state image sensing element by using an imaging optical system, and reading image information of the original, characterized by comprising:
a first light source for emitting light of a visible region;
a second light source for emitting light of an invisible region; and
a light guide plate which has said first and second light sources at an end face, guides incident light from the end face along a surface, and uniformly emits the light.
12. The apparatus according to claim 11, characterized in that said first light source is arranged at an end face of a long side of said light guide plate, and said second light source is arranged along a short side.
13. The apparatus according to claim 11, characterized in that said first light source includes a fluorescent tube, and said second light source includes an LED.
14. The apparatus according to claim 12, characterized in that the long and short sides are perpendicular to each other.
15. The apparatus according to claim 11, characterized in that a distance between a center of said first light source and a center of thickness of said light guide plate is shorter than a distance between a center of said second light source and the center of thickness of said light guide plate.
16. The apparatus according to claim 3, characterized in that said first light source is arranged nearer a center of thickness of said light guide plate than said second light source.
17. The apparatus according to claim 8, characterized in that said first light source is arranged nearer a center of thickness of said light guide plate than said second light source.
18. The apparatus according to claim 4, characterized in that said first light source is arranged along a long side of said light guide plate, and said second light source is arranged along a short side.
19. The apparatus according to claim 9, characterized in that said first light source is arranged along a long side of said light guide plate, and said second light source is arranged along a short side.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A memory system comprising:
memory cells including at least a first memory cell, a second memory cell, a third memory cell, and a fourth memory cell;
a first controller shifting threshold levels of the memory cells to four voltage levels (first voltage level<second voltage level<third voltage level<fourth voltage level) based on first and second data;
the first controller comprising (i) a first write mode for shifting a threshold level of the second memory cell to the second voltage level and a threshold level of the third memory cell to the third voltage level after shifting a threshold level of the fourth memory cell to the fourth voltage level based on the second data and (ii) a second write mode for shifting a threshold level of the third memory cell to the second voltage level after shifting a threshold level of the third memory cell to the third voltage level and a threshold level of the fourth memory cell to the fourth voltage level; and
a second controller configured to issue at least one of first and second commands to be supplied to the first controller in order to select at least one of the first and second write modes.
2. The system according to claim 1, wherein
when a third command which designates writing of the first data from a host device is received, the second controller issues the second command which designates the second write mode to the first controller; issues a fourth command for writing a part of the first data to the first controller; issues the first command which designates the first write mode to the first controller after completion of the writing; and issues a fifth command for writing a rest of the first data to the first controller.
3. The system according to claim 1, wherein
the second controller issues the second command which designates the second write mode and supplies the command to the first controller when a sixth command which designates a reliable write from a host device is received.
4. The system according to claim 1, wherein
the second controller issues the first command which designates the first write mode and supplies the command to the first controller when a seventh command which designates copy or move of data stored in the memory unit from a host device is received.
5. The system according to claim 1, wherein
the memory unit comprises a plurality of partitions having different attributes; and
the second controller issues at least one of the first command which designates the first write mode and the second command which designates the second write mode and supplies at least one of the first command and the second command to the first controller when an eighth command which is supplied from a host device and designates writing to one of the partitions is received.
6. The system according to claim 5, wherein
one of the partitions is a cache region; and
the second controller issues the first command which designates the first write mode and supplies the command to the first controller when a ninth command which designates writing into the cache region from the host device is received.
7. The system according to claim 6, wherein
one of the partitions is a reliable region having high reliability; and
the second controller issues the first command which designates the first write mode and supplies the command to the first controller when a tenth command which designates writing into the reliable region from the host device is received.
8. The system according to claim 1, wherein
the second controller stores an access pattern of a host device as history information; and
when an eleventh command from the host device is issued, the second controller issues at least one of the first command which designates the first write mode and the second command which designates the second write mode based on the history information and supplies the command to the first controller.
9. The system according to claim 8, wherein
the second controller issues the second command which designates the second write mode when it is determined that a write request supplied from the host device is for a small size write based on the history information and supplies the command to the first controller.
10. The system according to claim 8, wherein
the second controller issues the second command which designates the second write mode when it is determined that a write request supplied from the host device is for a large size write based on the history information and issues the first command which designates the first write mode when a response which indicates completion of writing a second page corresponding to a first page from the first controller is received.
11. A memory system comprising:
a first memory cell for storing a first bit and a second bit;
a second memory cell for storing a third bit and a fourth bit;
a third memory cell for storing a fifth bit and a sixth bit;
a fourth memory cell for storing a seventh bit and an eighth bit;
a first controller configured to write the first to eighth bits to the first to the fourth memory cells in a selected one of a first mode and a second mode; and
a second controller configured to issue at least one of first and second commands in order to select one of the first and second write modes and to supply the command to the first controller,
wherein the first controller executes a first write operation to write a first value to the first memory cell as the first bit, write the first value to the second memory cell as the third bit, write a second value which differs from the first value to the third memory cell as the fifth bit, and write the second value to the fourth memory cell as the seventh bit;
wherein when the first mode is selected, the first controller
executes a second write operation, after completion of the first write operation, to write the first value to the first memory cell as the second bit, and
executes a third write operation, after completion of the second write operation, to write the second value to the second memory cell as the fourth bit and a fourth write operation, after completion of the second write operation, to write the first value to the third memory cell as the sixth bit, and the third operation and the fourth operation are executed; and
wherein when the second mode has been selected, the first controller
executes the second write operation and the third write operation, after completion of the first write operation, and
executes the fourth write operation, after completion of the second write operation and the third write operation;
wherein the first bit, the third bit, the fifth bit, and the seventh bit belong to a first page; and
wherein the second bit, the fourth bit, the sixth bit, and the eighth bit belong to a second page.
12. The system according to claim 11, wherein
the second controller issues the second command which designates the second write mode to the first controller when a third command which designates to write first data from a host device is received; issues a fourth command for writing a part of the first data to the first controller after completion of the writing; issues the first command which designates the first write mode to the first controller; and issues a fifth command for writing a rest of the data to the first controller.
13. The system according to claim 11, wherein
the second controller issues the first command which designates the first write mode and supplies the command to the first controller when a sixth command which designates copy or move of data stored in a memory unit from a host device is received.
14. The system according to claim 13, wherein
the memory unit comprises a plurality of partitions having different attributes; and
the second controller issues at least one of the first command which designates the first write mode and the second command which designates the second write mode and supplies at least one of the first command and the second command to the first controller when a seventh command which is supplied from the host device and designates writing to one of the partitions is received.
15. The system according to claim 14, wherein
one of the partitions is a cache region; and
the second controller issues the first command which designates the first write mode and supplies the command to the first controller when an eighth command which designates writing into the cache region from the host device is received.
16. The system according to claim 15, wherein
one of the partitions is a reliable region having high reliability; and
the second controller issues the first command which designates the first write mode and supplies the command to the first controller when a ninth command which designates writing into the reliable region from the host device is received.
17. The system according to claim 11, wherein
the second controller stores an access pattern of a host device as history information; and
when an tenth command from the host device is issued, the second controller issues at least one of the first command which designates the first write mode and the second command which designates the second write mode based on the history information and supplies the command to the first controller.
18. The system according to claim 17, wherein
the second controller issues the second command which designates the second write mode when it is determined that a write request supplied from the host device is for a small size write based on the history information and supplies the command to the first controller.
19. The system according to claim 17, wherein
the second controller issues the second command which designates the second write mode when it is determined that a write request supplied from the host device is for a large size write based on the history information and issues the first command which designates the first write mode when a response which indicates completion of writing a second page corresponding to a first page from the first controller is received.
20. The system according to claim 11, wherein the first value is 0 data, and the second value is 1 data.