1461109585-3fa3ddf8-cdc1-4b29-a818-d1b3d9fdeda2

1. A surface treatment system, comprising:
a microwave chamber;
an insulating cavity located within the microwave chamber and configured to receive an object;
a supply of solvent gas in selective fluid communication with the insulating cavity;
a magnetron configured to emit microwave radiation; and
a waveguide operatively connected to the microwave chamber and the magnetron and configured to direct the microwave radiation into the insulating cavity to form a solvent gas plasma from the solvent gas, the solvent gas plasma being configured to dissolve surface contamination on the object.
2. The system of claim 1, further including a supply of surface treatment gas in selective fluid communication with the insulating cavity, wherein the direction of the microwave radiation into the insulating cavity forms a surface treatment gas plasma from the surface treatment gas.
3. The system of claim 2, wherein the surface treatment gas plasma is configured for at least one of heat treating and depositing a coating on the object.
4. The system of claim 1, wherein the insulating cavity includes a heat-resistant material substantially transparent to microwave radiation.
5. A surface treatment system, comprising:
a microwave chamber configured to receive an object;
a plasma chamber operatively connected to the microwave chamber;
a supply of solvent gas in selective fluid communication with the plasma chamber;
a magnetron configured to emit microwave radiation;
a waveguide operatively connected to the magnetron and configured to direct the microwave radiation into the plasma chamber to form a solvent gas plasma within the plasma chamber, the solvent gas plasma configured to dissolve surface contamination on the object; and
a movable nozzle device in fluid communication with the microwave chamber, the movable nozzle device being configured to direct the solvent gas plasma from the plasma chamber into the microwave chamber toward the object.
6. The system of claim 5, further including a supply of surface treatment gas in selective communication with the plasma chamber, wherein the microwave radiation forms a surface treatment gas plasma from the surface treatment gas.
7. The system of claim 6, wherein the surface treatment gas plasma is configured for at least one of heat treating and depositing a coating on the object.
8. A method of surface treating, comprising:
supplying a solvent gas in a region adjacent to a surface of an object; and
directing microwave radiation into the solvent gas to excite the solvent gas to form a solvent gas plasma, the solvent gas plasma being configured to dissolve surface contamination on the object.
9. The method of claim 8, further including supplying a surface treatment gas in the region adjacent to the surface of the component and directing microwave radiation into the surface treatment gas to excite the surface treatment gas to form a surface treatment gas plasma.
10. The method of claim 9, further including supplying the surface treatment gas simultaneously with the solvent gas.
11. The method of claim 9, further including supplying the surface treatment gas after supplying the solvent gas.
12. The method of claim 9, further including at least one of heat treating and depositing a coating on the surface of the object using the surface treatment gas.
13. A method of surface treating, comprising:
placing an object within a microwave chamber;
supplying a solvent gas in a plasma chamber;
directing microwave radiation into the plasma chamber to excite the solvent gas to form a solvent gas plasma; and
directing the solvent gas plasma from the plasma chamber toward a surface of the object within the microwave chamber, the solvent gas plasma being configured to dissolve surface contamination on the object.
14. The method of claim 13, further including supplying a surface treatment gas in the plasma chamber, directing microwave radiation into the plasma chamber to excite the surface treatment gas to form a surface treatment gas plasma, and directing the surface treatment gas plasma from the plasma chamber toward the surface of the object.
15. The method of claim 14, further including supplying the surface treatment gas simultaneously with the solvent gas.
16. The method of claim 14, further including supplying the surface treatment gas after supplying the solvent gas.
17. The method of claim 14, further including at least one of heat treating and depositing a coating on the surface of the object using the surface treatment gas.
18. The method of claim 14, further including passing the surface treatment gas plasma through a movable nozzle to create a directed flow.
19. The method of claim 13, further including passing the solvent gas plasma through a movable nozzle to create a directed flow.
20. The method of claim 13, further including converting the solvent gas into a reactive state to dissolve surface contamination.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A time sequence control circuit for controlling a first voltage received by a power supply receiving terminal of a motherboard of a computer greater than a preset voltage before a signal control terminal on the motherboard receives a second voltage during turning on the computer, the control circuit comprising:
a control circuit connected to the power supply receiving terminal to receive the first voltage;
a delay circuit connected to the control circuit; and
a power conversion circuit connected between the delay circuit and the signal control terminal, to convert the first voltage into the second voltage;
wherein the control circuit comprises first and second diodes, and first and second electronic switches, anodes of the first and second diodes are connected to the power supply receiving terminal, a cathode of the first diode is grounded via first and second resistors connected in series, a cathode of the second diode is connected to the delay circuit, a first terminal of the first electronic switch is connected to a node between the first and second resistors, a second terminal of the first electronic switch is grounded, a third terminal of the first electronic switch is connected to a first terminal of the second electronic switch, and is also connected to the power supply receiving terminal via a third resistor, a second terminal of the second electronic switch is grounded, a third terminal of the second electronic switch is connected to the delay circuit; when the computer is turned on, the first voltage increases to the preset voltage, the first terminal of the first electronic switch is at high level, the first electronic switch is turned on, the first terminal of the second electronic switch is at a low level, and the second electronic switch is turned off; and wherein when the computer is turned on, the power supply receiving terminal increases to the preset voltage, the control circuit is turned off, the power conversion circuit converts the first voltage into the second voltage and provides the second voltage to the signal control terminal after delaying for a period of time.
2. The control circuit of claim 1, wherein the first and second electronic switches are npn bipolar junction transistors, and the first to third terminals of the first and second electronic switches are bases, emitters, and collectors of the npn bipolar junction transistors.
3. The control circuit of claim 1, wherein the third terminal of the first electronic switch is connected to the node between the first and second resistors via a fourth resistor.
4. The control circuit of claim 1, wherein the delay circuit comprises a fourth resistor and a capacitor, the fourth resistor is connected between the cathode of the second diode and the third terminal of the second electronic switch, and the capacitor is connected between the third terminal of the second electronic switch and ground.
5. The control circuit of claim 4, wherein the power conversion circuit comprises third to sixth electronic switches, a first terminal of the third electronic switch is connected to the third terminal of the second electronic switch via a fifth resistor, a second terminal of the third electronic switch is grounded, a third terminal of the third electronic switch is connected to a first terminal of the fourth electronic switch, and is also connected to the power supply receiving terminal via a sixth resistor, a second terminal of the fourth electronic switch is grounded, a third terminal of the fourth electronic switch is connected to the signal control terminal, a first terminal of the fifth electronic switch is connected to the third terminal of the second electronic switch, a second terminal of the fifth electronic switch is grounded, a third terminal of the fifth electronic switch is connected to the power supply receiving terminal via a seventh resistor, and is also connected to a first terminal of the sixth electronic switch via an eighth resistor, a second terminal of the sixth electronic switch is connected to the power supply receiving terminal, a third terminal of the sixth electronic switch is grounded via a ninth and a tenth resistors, a node between the ninth and tenth resistors is connected to the signal control terminal; wherein when the computer is turned on, the first voltage increases to the preset voltage, the third and fifth electronic switches are turned on after delayed for a period of time by the delay circuit, the first terminals of the fourth and sixth electronic switches are at low level, the fourth electronic switch is turned off, the sixth electronic switch is turned on, and the signal control terminal receives the second voltage.
6. The control circuit of claim 5, wherein the third and fifth electronic switches are re-channel metal oxide semiconductor field effect transistors (NMOSFETs), and the first to third terminals of the third and fifth electronic switches are gates, sources, and drains of the NMOSFETs, respectively.
7. The control circuit of claim 5, wherein the fourth and sixth electronic switches are npn and pnp bipolar junction transistors, respectively, and the first to third terminals of the fourth and sixth electronic switches are bases, emitters, and collectors of the npn and pnp bipolar junction transistors, respectively.
8. The control circuit of claim 1, wherein a maximum voltage of the first voltage is 3.3 volts.
9. The control circuit of claim 1, wherein the preset voltage is 2.7 volts.