1. A non-transitory machine readable medium containing executable computer program instructions which when executed by a data processing system cause the data processing system to perform a method of designing an integrated circuit (IC), the method comprising:
generating a representation of a shielding mesh in at least one layer of a representation of a design of the IC, the shielding mesh having a first plurality of lines which are designed to provide a first reference voltage and having a second plurality of lines which are designed to provide a second reference voltage and wherein the shielding mesh comprises a window in which signal lines are routed with less shielding than signal lines which are routed in the shielding mesh; and
generating a representation of power supply lines in at least a first layer of the representation of the IC, the first layer containing the representation of the power supply lines being different than the at least one layer which contains the shielding mesh, the power supply lines being coupled to the shielding mesh and being larger in width than the first plurality of lines and the second plurality of lines.
2. The non-transitory machine medium as in claim 1 wherein the power supply lines are aligned in substantial geometric registration with the window and wherein the power supply lines include lines which are designed to provide the first reference voltage and lines which are designed to provide the second reference voltage.
3. The non-transitory machine readable medium as in claim 1 wherein the at least one layer which contains the shielding mesh does not contain power supply lines, having larger widths than the first plurality of lines and the second plurality of lines, in proximity to the shielding mesh.
4. The non-transitory machine readable medium of claim 1, wherein the method further comprises
generating a representation of power supply lines in at least a second layer of the representation of the IC.
5. The non-transitory machine readable medium of claim 1, wherein the power supply lines are coupled to the shielding mesh through vias between the first layer and the at least one layer.
6. The non-transitory machine readable medium of claim 1, wherein at least one of the power supply lines is coupled to at least two of the first plurality of lines.
7. A method to design an integrated circuit (IC), the method comprising:
generating a representation of a shielding mesh in at least one layer of a representation of a design of the IC, the shielding mesh having a first plurality of lines which are designed to provide a first reference voltage and having a second plurality of lines which are designed to provide a second reference voltage and wherein the shielding mesh comprises a window in which signal lines are routed with less shielding than signal lines which are routed in the shielding mesh; and
generating a representation of power supply lines in at least a first layer of the representation of the IC, the first layer containing the representation of the power supply lines being different than the at least one layer which contains the shielding mesh, the power supply lines being coupled to the shielding mesh and being larger in width than the first plurality of lines and the second plurality of lines, wherein at least one of the generating the representation of the shielding mesh and the generating the representation of the power supply lines is performed by a processor.
8. The method of claim 7 wherein the power supply lines are aligned in substantial geometric registration with the window and wherein the power supply lines include lines which are designed to provide the first reference voltage and lines which are designed to provide the second reference voltage.
9. The method of claim 7 wherein the at least one layer which contains the shielding mesh does not contain power supply lines, having larger widths than the first plurality of lines and the second plurality of lines, in proximity to the shielding mesh.
10. The method of claim 7, wherein the method further comprises
generating a representation of power supply lines in at least a second layer of the representation of the IC.
11. The method of claim 7, wherein the power supply lines are coupled to the shielding mesh through vias between the first layer and the at least one layer.
12. The method of claim 7, wherein at least one of the power supply lines is coupled to at least two of the first plurality of lines.
13. A data processing system to design an integrated circuit (IC), the data processing system comprising:
means for generating a representation of a shielding mesh in at least one layer of a representation of a design of the IC, the shielding mesh having a first plurality of lines which are designed to provide a first reference voltage and having a second plurality of lines which are designed to provide a second reference voltage and wherein the shielding mesh comprises a window in which signal lines are routed with less shielding than signal lines which are routed in the shielding mesh; and
means for generating a representation of power supply lines in at least a first layer of the representation of the IC, the first layer containing the representation of the power supply lines being different than the at least one layer which contains the shielding mesh, the power supply lines being coupled to the shielding mesh and being larger in width than the first plurality of lines and the second plurality of lines.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A flexible semiconductor device comprising:
a support layer made of a metal foil;
a semiconductor structure portion formed on the support layer, the semiconductor structure portion comprising a semiconductor layer and an insulating layer formed on the surface of the semiconductor layer; and
a resin film formed on the semiconductor structure portion,
wherein the resin film has an opening which penetrates from an upper surface of the flexible semiconductor device to an upper surface of the semiconductor structure portion,
wherein an electroconductive member which is in contact with the surface of the semiconductor structure portion is disposed within the opening of the resin film,
wherein only the electroconductive member is disposed in the opening.
2. The flexible semiconductor device according to claim 1, wherein a wall surface of the opening forms an obtuse angle with respect to the top surface of the resin film.
3. The flexible semiconductor device according to claim 1, wherein at least a part of the insulating layer serves as a gate insulating film; and
wherein at least a part of the electroconductive member serves as a gate electrode.
4. The flexible semiconductor device according to claim 3, wherein the semiconductor layer comprises a silicon, and the insulating layer consists of a silicon oxide film.
5. The flexible semiconductor device according to claim 3, wherein the semiconductor layer comprises an oxide semiconductor material.
6. The flexible semiconductor device according to claim 5, wherein the oxide semiconductor material is ZnO or InGaZnO.
7. The flexible semiconductor device according to claim 4, wherein the semiconductor layer has a carrier mobility of 3 to 300 cm2Vs due to a heating treatment induced by laser irradiation of the semiconductor structure portion.
8. The flexible semiconductor device according to claim 1, wherein an insulating film is formed on the metal foil, and the semiconductor structure portion is provided on the insulating film.
9. The flexible semiconductor device according to claim 1, wherein the resin film comprises at least one resin selected from the group consisting of an epoxy resin, a polyimide resin, an acrylic resin, a polyethylene terephthalate resin, a polyethylenenaphthalate resin, a polyphenylene sulfide resin, a polyphenylene ether resin and a polytetrafluoroethylene.
10. The flexible semiconductor device according to claim 1, wherein the electroconductive member is made from an electroconductive paste.
11. The flexible semiconductor device according to claim 1, wherein an inner circumferential wall of the opening is formed by the resin film, and the electroconductive member directly contacts the resin film at the inner circumferential wall.
12. The flexible semiconductor device according to claim 11, wherein an upper surface of the semiconductor layer contacts a bottom surface of the resin film and a bottom surface of the electroconductive member.
13. The flexible semiconductor device according to claim 1,
wherein an inner circumferential wall of the opening is formed by the resin film, and the electroconductive member directly contacts the resin film at the inner circumferential wall,
wherein an upper surface of the semiconductor layer contacts a bottom surface of the resin film and a bottom surface of the electroconductive member,
wherein a wall surface of the opening forms an obtuse angle with respect to the top surface of the resin film,
wherein at least a part of the insulating layer serves as a gate insulating film,
wherein at least a part of the electroconductive member serves as a gate electrode,
wherein the semiconductor layer comprises a silicon, and the insulating layer consists of a silicon oxide film,
wherein the semiconductor layer comprises ZnO or InGaZnO,
wherein the semiconductor layer has a carrier mobility of 3 to 300 cm2Vs due to a heating treatment induced by laser irradiation of the semiconductor structure portion,
wherein an insulating film is formed on the metal foil, and the semiconductor structure portion is provided on the insulating film, and
wherein the resin film comprises at least one resin selected from the group consisting of an epoxy resin, a polyimide resin, an acrylic resin, a polyethylene terephthalate resin, a polyethylenenaphthalate resin, a polyphenylene sulfide resin, a polyphenylene ether resin and a polytetrafluoroethylene.
14. A display device having a screen, wherein the flexible semiconductor device of claim 13 is disposed in the screen,
wherein at least a part of the electroconductive member is a gate electrode, and
wherein at least a part of the insulating layer is a gate insulating film.
15. The flexible semiconductor device according to claim 1, wherein an upper surface of the semiconductor layer contacts a bottom surface of the resin film and a bottom surface of the electroconductive member.
16. A display device having a screen, wherein the flexible semiconductor device of claim 1 is disposed in the screen,
wherein at least a part of the electroconductive member is a gate electrode, and
wherein at least a part of the insulating layer is a gate insulating film.