What is claimed is:
1. A method for using a data path comprising a plurality of processing elements (PEs), comprising:
transmitting a carry bit from a first PE to a second PE using a first carry chain;
generating a signal in the second PE in response to the received carry bit; and
transmitting the signal from the second PE to the first PE using a second carry chain, wherein the signal reconfigures the data path.
2. The method of claim 1, wherein the first PE comprises a least significant byte of the data path and the second PE comprises a most significant byte of the data path.
3. The method of claim 1, wherein transmitting the signal from the second PE to the first PE further comprises transmitting the signal through each PE of the data path, wherein each PE uses logic to manipulate a resident bit sequence in response to the signal.
4. The method of claim 3, wherein the logic is configurable.
5. The method of claim 1, further comprising:
transmitting configuration data to the plurality of PEs;
defining the data path by designating the plurality of PEs in response to the configuration data; and
programming the plurality of PEs that comprise the data path in response to the configuration data.
6. The method of claim 5, further comprising:
setting a flag in the first PE in response to the configuration data, the flag in the first PE designating the first PE as comprising the least significant byte of the data path; and
setting a flag in the second PE in response to the configuration data, the flag in the second PE designating the second PE as comprising the most significant byte of the data path.
7. The method of claim 1, wherein generating the signal further comprises using logic to test for saturation in the data path.
8. The method of claim 1, wherein the first and second carry chains support carry operations for non-local functions comprising saturated and minimum and maximum arithmetic functions.
9. The method of claim 8, wherein each PE of the data path is programmed to support the same function, the programming occurring through a function port of each PE.
10. The method of claim 1, wherein the first carry chain comprises a forward channel between the first and the second PEs.
11. The method of claim 1, wherein the second carry chain comprises a back propagation channel between the second and the first PEs, the back propagation channel coupling the plurality of PEs of the data path.
12. The method of claim 11, wherein a saturation signal is transmitted over the back propagation channel.
13. The method of claim 11, wherein a signal that selects a saturation value is transmitted over a second back propagation channel.
14. The method of claim 1, wherein the plurality of PEs comprises a plurality of multiple context processing elements.
15. The method of claim 1, wherein the first carry chain comprises a left-going carry chain.
16. The method of claim 1, wherein the second carry chain comprises a right-going carry chain.
17. The method of claim 1, wherein transmitting the carry bit from the first PE to the second PE further comprises transmitting the carry bit from a first arithmetic logic unit (ALU) of the first PE to a second ALU of the second PE.
18. The method of claim 1, wherein generating the signal in the second PE further comprises generating the signal in an arithmetic logic unit of the second PE.
19. The method of claim 1, wherein transmitting the signal further comprises transmitting the signal from an arithmetic logic unit (ALU) of the second PE to an ALU of the first PE.
20. The method of claim 1, wherein
the first PE includes a first arithmetic logic unit (ALU);
the second PE includes a second ALU; and
the carry bit is transmitted from the first ALU of the first MCPE to the second ALU of the second MCPE.
21. The method of claim 20, wherein generating the signal further comprises generating the signal in the second ALU of the second PE.
22. The method of claim 21, wherein transmitting the signal further comprises transmitting the signal from the second ALU of the second PE to the first ALU of the first PE.
23. An apparatus for using a data path comprising a plurality of processing elements (PEs), comprising:
a first carry chain for transmitting a carry bit from a first PE to a second PE;
logic for generating a signal in the second PE in response to the received carry bit; and
a second carry chain for transmitting the signal from the second PE to the first PE, wherein the signal reconfigures the data path.
24. The apparatus of claim 23, wherein the first PE comprises a least significant byte of the data path and the second PE comprises a most significant byte of the data path.
25. The apparatus of claim 24, wherein the signal is transmitted from the second PE to the first PE by passing through each PE of the data path, and wherein each PE uses logic to manipulate a resident bit sequence in response to the signal.
26. The apparatus of claim 25, wherein the logic is configurable.
27. The apparatus of claim 23, further comprising:
a controller for transmitting configuration data to the plurality of PEs;
logic for defining the data path by designating the plurality of PEs in response to the configuration data; and
logic for programming the plurality of PEs that comprise the data path in response to the configuration data.
28. The apparatus of claim 23, wherein the signal generated in the second PE is generated using logic, the logic testing for saturation in the data path.
29. The apparatus of claim 23, wherein the second carry chain comprises a back propagation channel between the second and the first PEs, the back propagation channel coupling the plurality of PEs of the data path.
30. The apparatus of claim 23, wherein the plurality of PEs comprises a plurality of multiple context processing elements (MCPEs).
31. The apparatus of claim 30, further comprising a configuration memory context in each of the plurality of MCPEs, the configuration memory context controlling each MCPE in response to the configuration data.
32. The apparatus of claim 23, wherein the first carry chain comprises a left-going carry chain.
33. The apparatus of claim 23, wherein the second carry chain comprises a right-going carry chain.
34. The apparatus of claim 23, wherein the first carry chain transmits the carry bit from an arithmetic logic unit (ALU) of the first PE to an ALU of the second PE.
35. The apparatus of claim 23, wherein
the first PE includes a first arithmetic logic unit (ALU);
the second PE includes a second ALU; and
the carry bit is transmitted from the first ALU of the first MCPE to the second ALU of the second MCPE.
36. The apparatus of claim 35, wherein the logic generates the signal in the second ALU of the second PE.
37. The apparatus of claim 35, wherein the signal is transmitted with the second carry chain from the second ALU of the second PE to the first ALU of the first PE.
38. A system for using a data path in a reconfigurable computing device, comprising:
an array of processing elements (PEs);
a network coupled to the array of PEs, the network transmitting configuration data;
a first carry chain for transmitting a carry bit from a first PE to a second PE; and
a second carry chain for transmitting a signal from the second PE to the first PE, wherein the signal reconfigures the data path.
39. The system of claim 38, further comprising logic for generating a signal in the second PE in response to the received carry bit.
40. The system of claim 39, wherein the logic is configurable.
41. The system of claim 38, wherein the first PE comprises a least significant byte of the data path and the second PE comprises a most significant byte of the data path.
42. The system of claim 38, wherein the signal is transmitted from the second PE to the first PE by passing through each PE of the data path, wherein each PE uses logic to manipulate a resident bit sequence in response to the at least one signal.
43. The system of claim 38, wherein the network comprises:
a transmitter for transmitting configuration data to the plurality of PEs;
logic for defining the data path by designating the plurality of PEs in response to the configuration data; and
logic for programming the plurality of PEs that comprise the data path in response to the configuration data.
44. The system of claim 38, wherein the signal generated in the second PE is generated using logic to test for saturation in the data path.
45. The system of claim 38, wherein each PE of the data path is programmed to support non-local functions comprising saturated and minimum and maximum arithmetic functions, the programming occurring through at least one function port of each PE.
46. The system of claim 38, wherein the first carry chain comprises a forward channel between the first and the second PEs.
47. The system of claim 38, wherein the second carry chain comprises a back propagation channel between the second and the first PEs.
48. The system of claim 47,wherein the back propagation channel couples the plurality of PEs of the data path.
49. The system of claim 38, wherein the first carry-chain comprises a left-going carry chain.
50. The system of claim 38, wherein the second carry-chain comprises a right-going carry chain.
51. The system of claim 38, wherein the plurality of PEs comprises a plurality of multiple context processing elements (MCPEs).
52. The system of claim 51, wherein each MCPE includes a configuration memory context.
53. The system of claim 38, wherein
the first PE includes a first arithmetic logic unit (ALU);
the second PE includes a second ALU; and
the carry bit is transmitted from the first ALU of the first MCPE to the second ALU of the second MCPE.
54. The system of claim 53, wherein the logic generates the signal in the second ALU of the second PE.
55. The system of claim 53, wherein the signal is transmitted with the second carry chain from the second ALU of the second PE to the first ALU of the first PE.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A hair remover comprising:
an outer blade;
a drive source; and
an inner blade accommodated in the outer blade, the inner blade being rotatable by the drive source to clip body hair in cooperation with the outer blade;
the outer blade including:
a cylindrical side wall;
an upper wall;
a bend connecting the side wall and the upper wall; and
straight upper cutting edges and straight side cutting edges formed by a plurality of slits extending from the upper wall to an upper part of the side wall; and
the inner blade including a straight upper cutting edge, which is formed at a location corresponding to the upper cutting edges of the upper blade, and a straight side cutting edge, which is formed at a location corresponding to the side cutting edges of the outer blade;
wherein the outer blade and the inner blade are formed so as to clip body hair through at least cooperation between the straight side cutting edges and cooperation between the straight upper cutting edges.
2. The hair remover according to claim 1, wherein the upper cutting edges of the outer blade and the inner blade each extend straight and perpendicular to a rotation axis of the inner blade.
3. The hair remover according to claim 1, wherein the outer blade includes an even number of the slits that are arranged at equal angular intervals.
4. The hair remover according to claim 3, wherein the outer blade includes eight of the slits.
5. The hair remover according to claim 1, wherein the upper cutting edge of the inner blade is discrete from the side cutting edge of the inner blade.
6. The hair remover according to claim 1, wherein the upper wall is flat;
the outer blade includes a plurality of teeth defined by the slits, each tooth including:
a basal portion extending upward substantially parallel to a center axis of the outer blade;
a distal portion extending inward toward the center axis of the outer blade; and
a curved bent portion located between the basal portion and the distal portion; and
wherein the upper cutting edges of the outer blade are formed on the distal portions of the teeth; and
the side cutting edges of the outer blade are formed on the basal portions of the teeth.
7. The hair remover according to claim 6, wherein the inner blade further includes a relief formed at a location corresponding to the bend of the outer blade, the relief of the inner blade is free from contact with the outer blade, and the inner blade is in contact with the outer blade only at straight portions including the upper cutting edge and the side cutting edge.