1461124865-d8ac6398-3059-4f04-9b7f-24261b3f2720

What is claimed is:

1. An image-decoding method for decoding plural digital image data in a memory comprising steps of:
capturing a bidirectionally predictive-coded frame (B-frame) data and a reference frame data corresponding to said B-frame data from said plural digital image data in said memory;
decoding a first field data of said B-frame data by means of referring said reference frame data for obtaining a decoded first field data; and
decoding a second field data of said B-frame data by means of referring said decoded first field data and said reference frame data for obtaining a decoded second field data overwriting said decoded first field data.
2. The image-decoding method according to claim 1 wherein said plural digital image data are motion picture expert group (MPEG) data.
3. The image-decoding method according to claim 1 wherein said plural digital image data comprise intra-coded frames (I-frames), predictive-coded frames (P-frames) and bidirectionally predictive-coded frames (B-frames).
4. The image-decoding method according to claim 1 wherein said first field data and said second field data are selected respectively from a top field data and a bottom field data of said B-frame data.
5. The image-decoding method according to claim 1 wherein said reference frame data is a frame pixel data.
6 The image-decoding method according to claim 1 further comprising a step of modifying said reference frame data, so as to provide said reference frame data for said B-frame data correctly before referred.
7. The image-decoding method according to claim 1 wherein said first field data is stored in said memory and occupies a memory space being one half of that of said reference frame.
8. The image-decoding method according to claim 1 wherein said second field data is stored in said memory and occupies a memory space being one half of that of said reference frame.
9. The image-decoding method according to claim 1 wherein said plural digital image data are a 3:2 pull down pictures.
10. The image-decoding method according to claim 9 wherein said B-frame data comprise said first field data, said second field data and a third field data formed by means of decoding said first field data.
11. The image-decoding method according to claim 10 wherein said second field data is registered in said memory for being further accessible thereto.
12. The image-decoding method according to claim 11 wherein said second field data is stored in said memory and occupies a memory space being one half of that of said reference frame.
13. The image-decoding method according to claim 12 further comprising a step of decoding said first field data for obtaining said third field data corresponding to said first field data after loading said second field data and said reference frame data, so as to register said third field data in said memory.
14. The image-decoding method according to claim 13 wherein said third field data is stored in said memory and occupies a memory space being one half of that of said reference frame.
15. The image-decoding method according to claim 14 wherein said reference frame data is selected from one of a decoded I-frame and a decoded P-frame.
16. The image-decoding method according to claim 14 wherein said I-frame and P-frame are an I frame pixel data and a P frame pixel data respectively.
17. The image-decoding method according to claim 1 wherein said B-frame data is selected from one of a 168 picture block and a 1616 picture block.
18. The image-decoding method according to claim 1 wherein said reference frame data is selected from one of a 168 picture block and a 1616 picture block.
19. An image-decoding device for decoding plural digital image data in a memory comprising:
a bidirectionally predictive-coded frame (B-frame) data having a first field data and a second field data;
a reference frame data corresponding to said B-frame data and selected from said plural digital image data in said memory;
a modifying means for modifying said reference frame data, so as to provide said reference frame data for said B-frame data correctly;
a decoding unit for decoding said B-frame data by means of referring said modified reference frame data, so as to obtain a decoded first field data;
an image reconstruction unit for reconstructing said reference frame data and said decoded first field data; and
a display controller for controlling and being accessible to said decoded first field data and said reference frame data, thereby said image-decoding device further decoding said second field data by means of referring said decoded first frame data and said reference frame data.
20. The image-decoding device according to claim 19 wherein said plural digital image data, said first field data and said reference frame data are stored in said memory.
21. The image-decoding device according to claim 19 wherein said first field data and said second field data are selected from a top field data and a bottom field data of said B-frame data respectively.
22. The image-decoding device according to claim 19 wherein said reference frame data is a frame pixel data.
23 The image-decoding device according to claim 19 wherein said first field data is stored in said memory and occupies a memory space being one half of that of said reference frame.
24. The image-decoding device according to claim 19 wherein said second field data is stored in said memory and occupies a memory space being one half of that of said reference frame.
25. The image-decoding device according to claim 19 wherein said image-decoding device decodes said second field data of said B-frame data for obtaining a decoded second field data.
26. The image-decoding device according to claim 19 wherein said plural digital picture data are a 3:2 pull down pictures.
27. The image-decoding method according to claim 26 wherein said 3:2 pull down picture is said B-frame data comprising said first field data, said second field data and a third field data formed by means of decoding said first field data.
28. The image-decoding device according to claim 27 wherein said image-decoding device decodes said second field data for obtaining a decoded second field data corresponding to said second field data.
29. The image-decoding device according to claim 28 wherein said second field data is stored in said memory and occupies a memory space the same as that of said first field data and being one half of that of said reference frame.
30. The image-decoding device according to claim 28 wherein said first field data is decoded after being accessible to said second field data and said reference frame data for obtaining said third field data corresponding to said first field data, so as to register said third field data in said memory for being further accessible thereto.
31. The image-decoding device according to claim 30 wherein said third field data is stored in said memory and occupies a memory space the same as that of said first field data and being one half of that of said reference frame.
32. The image-decoding device according to claim 19 wherein said reference frame data is selected from one of an I frame pixel data and a P frame pixel data.
33. An image-decoding method for decoding plural digital image data in a memory comprising steps of:
providing a bidirectionally predictive-coded frame (B-frame) data and capturing a reference frame data corresponding to said B-frame data from said plural digital image data in said memory, wherein said B-frame data includes a first field data;
modifying said reference frame data to be provided for said B-frame data correctly;
decoding said first field data by means of referring said reference frame data for obtaining a decoded first field data;
reconstructing said decoded first field data and said reference frame data, so as to register and be accessible to said decoded first field data and said reference frame data in said memory for being further accessible to decode said B-frame data.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A liquid crystal display device comprising a plurality of pixels, each including a first subpixel and a second subpixel, wherein each of the first and second subpixels includes:
a counter electrode;
a subpixel electrode; and
a liquid crystal layer interposed between the counter electrode and the subpixel electrode, and
wherein the subpixel electrodes of the first and second subpixels are provided separately from each other as first and second subpixel electrodes, respectively, while the first and second subpixels share the same counter electrode with each other, and
wherein when a predetermined grayscale tone is displayed through four or more consecutive even number of vertical scanning periods, the first and second subpixels have mutually different luminances in at least two of the even number of vertical scanning periods, first polarity periods that are included in the even number of vertical scanning periods and that maintain a first polarity are as long as second polarity periods that are also included in the even number of vertical scanning periods and that maintain a second polarity for each of the first and second subpixels, and in each of the first and second polarity periods, the difference between the average of effective voltages applied to the liquid crystal layer of the first subpixel and that of effective voltages applied to the liquid crystal layer of the second subpixel is substantially equal to zero, and
wherein the polarities of the first and second subpixels are inverted every other vertical scanning period,
wherein in either the first polarity periods or the second polarity periods, one of the two vertical scanning periods satisfies |VLspa|>|VLspb| and the other vertical scanning period satisfies |VLspa|<VLspb|, and
wherein in the other polarity periods, VLspa is equal to VLspb in each of the two vertical scanning periods, wherein the effective voltages applied to the respective liquid crystal layers of the first and second subpixels of each said pixel are represented by VLspa and VLspb, respectively.
2. The liquid crystal display device of claim 1, wherein two of the four consecutive vertical scanning periods are the first polarity periods and the other two vertical scanning periods are the second polarity periods, and
wherein in at least one the first polarity periods and the second polarity periods, one of the two vertical scanning periods thereof satisfies |VLspa >|VLspb| and the other vertical scanning period satisfies |VLspa|<|VLspb|.
3. The liquid crystal display device of claim 1, wherein two of the four consecutive vertical scanning periods are the first polarity periods and the other two vertical scanning periods are the second polarity periods, and
wherein in at least one of the first polarity periods and the second polarity periods, the |VLspa| and |VLspb values of one of the two vertical scanning periods thereof are equal to those of the other vertical scanning period.
4. The liquid crystal display device of claim 1 wherein the plurality of the pixels are arranged in column and row directions so as to form a matrix pattern, and
wherein in each of the plurality of the pixels the first and second subpixels are arranged in the column direction.
5. The liquid crystal display device of claim 1, wherein in each of the plurality of the pixels, voltages applied to the first and second subpixel electrodes change as voltages on their associated storage capacitor lines vary.
6. The liquid crystal display device of claim 1, wherein in each of the plurality of the pixels, the first and second subpixel electrodes are connected to the same signal line by way of their associated switching element.
7. The liquid crystal display device of claim 1, wherein in each of the plurality of the pixels, the first and second subpixel electrodes are respectively connected to first and second signal lines by way of first and second switching elements, respectively.
8. The liquid crystal display device of claim 1, wherein the frame frequency is 60 Hz.
9. The liquid crystal display device of claim 1, wherein in each of the plurality of the pixels, |VLspa| and |VLspb| switch their magnitudes every other vertical scanning period, and
wherein |VLspa| and |VLspb| switch their magnitudes non-synchronously with the inversion of the polarities of the first and second subpixels.
10. The liquid crystal display device of claim 1, wherein voltages on storage capacitor lines associated with the first and second subpixel electrodes change between a first level, a second level that is higher than the first level, and a third level that is higher than the second level.
11. The liquid crystal display device of claim 1, wherein the first and second subpixel electrodes have the same display area.
12. The liquid crystal display device of claim 2, wherein of the four vertical scanning periods, the number of vertical scanning periods that satisfy |VLspa|>|VLspb| is equal to that of vertical scanning periods that satisfy |VLspa|<|VLspb|.
13. The liquid crystal display device of claim 3, wherein of the four vertical scanning periods, the number of vertical scanning periods that satisfy |VLspa|>|VLspb| is equal to that of vertical scanning periods that satisfy |VLspa|<|VLspb|.
14. The liquid crystal display device of claim 4, wherein a voltage applied to the second subpixel electrode of a particular one of the plurality of the pixels and a voltage applied to the first subpixel electrode of another pixel that is adjacent to the particular pixel in the column direction change as the voltage on their common storage capacitor line varies.
15. The liquid crystal display device of claim 4, wherein a voltage applied to the second subpixel electrode of a particular one of the plurality of the pixels and a voltage applied to the first subpixel electrode of another pixel that is adjacent to the particular pixel in the column direction change as voltages on their associated storage capacitor lines vary.
16. The liquid crystal display device of claim 5, wherein in each of the plurality of the pixels, a voltage on a storage capacitor line associated with the first subpixel electrode and a voltage on a storage capacitor line associated with the second subpixel electrode change mutually differently.