1. A ceramic feedthrough interconnection assembly comprising:
A. a matrix having
a. a first section comprising an electrically insulating material having a first dielectric constant; and
b. a second section comprising an electrically insulating material having a second dielectric constant;
B. said matrix further comprising:
a. a first trans-matrix signal lead for communicating an electrical information signal such that said signal lead is exposed exclusively to said first electrically insulating material in said first section and to said second electrically insulating material in said second section; and
b. a trans-matrix auxiliary lead; and
C. a shield extending through said first and second sections and electrically shielding said signal lead from said auxiliary lead, said shield in said first and second sections is positioned at a distance from said signal lead with respect to the dielectric constant of any electrically insulating material such that the electrical information signal experiences a defined and substantially constant impedance.
2. The ceramic feedthrough interconnection assembly of claim 1 further comprising a second trans-matrix signal lead for communicating the electrical information signal on a differential signal format, said first and second signal leads being separated by a distance of electrically insulating material in each of said first and second sections, said distance being adapted with respect to the dielectric constant of the material present between said first and second signal leads.
3. The ceramic feedthrough interconnection assembly of claim 2 further comprising a design adapted to extend over a single face of a component capsule.
4. The ceramic feedthrough interconnection assembly of claim 2 in which said first signal lead comprises a stripline structure in said first section.
5. The ceramic feedthrough interconnection assembly of claim 4 in which said first signal lead comprises a microstrip structure in said second section.
6. The ceramic feedthrough interconnection assembly of claim 1 in which said shield comprises a lead for connection to an external ground potential.
7. The ceramic feedthrough interconnection assembly according to claim 6 in which said shield exclusively surrounds said first signal lead.
8. The ceramic feedthrough interconnection assembly according to claim 1 in which said electrically insulating material in said first section comprises a ceramic material, and said electrically insulating material in said second section comprises a non-ceramic electrically insulating material.
9. The ceramic feedthrough interconnection assembly of claim 8 in which said first signal lead comprises a stripline structure in said first section.
10. The ceramic feedthrough interconnection assembly of claim 8 further comprising a second trans-matrix signal lead.
11. A ceramic feedthrough interconnection assembly comprising:
A. a matrix having
a. a first section comprising a ceramic electrically insulating material having a first dielectric constant; and
b. a second section comprising a non-ceramic electrically insulating material having a second dielectric constant;
B. said matrix further comprising:
a. at least two trans-matrix signal leads for communicating an electrical information signal such that said signal leads are exposed exclusively to said first electrically insulating material in said first section and to said second electrically insulating material in said second section; and
b. a trans-matrix auxiliary lead; and
C. a shield extending through said first and second sections and electrically shielding said signal leads from said auxiliary lead, said shield in said first and second sections is of a size and shape so as to provide a defined and substantially constant impedance in said signal leads.
12. The ceramic feedthrough interconnection assembly of claim 11 further comprising a design adapted to extend over a single face of a component capsule.
13. The ceramic feedthrough interconnection assembly of claim 11 in which said first signal lead comprises a stripline structure in said first section.
14. The ceramic feedthrough interconnection assembly of claim 13 in which said shield comprises a lead for connection to an external ground potential.
15. The ceramic feedthrough interconnection assembly of claim 13 in which said first signal lead comprises a microstrip structure in said second section.
16. An optoelectrical capsule for converting information signals between an electrical signal format and an optical signal format, comprising a capsule having a feedthrough interconnection assembly comprising:
A. a matrix having
a. a first section comprising an electrically insulating material having a first dielectric constant; and
b. a second section comprising an electrically insulating material having a second dielectric constant;
B. said matrix further comprising:
a. a trans-matrix signal lead for communicating an electrical information signal such that said signal lead is exposed exclusively to said first electrically insulating material in said first section and to said second electrically insulating material in said second section; and
b. a trans-matrix auxiliary lead; and
C. a shield extending through said first and second sections and electrically shielding said signal lead from said auxiliary lead, said shield in said first and second sections is positioned at a distance from said signal lead with respect to the dielectric constant of any electrically insulating material such that the electrical information signal experiences, and is of a size and shape so as to provide, a defined and substantially constant impedance.
17. The optoelectrical capsule of claim 16 in which said electrically insulating material having a first dielectric constant comprising a ceramic material.
18. The optoelectrical capsule of claim 16 in which said electrically insulating material having a second dielectric constant comprising a non-ceramic material.
19. The optoelectrical capsule of claim 16 further comprising positioning said feedthrough interconnection assembly in a manner effective to permit said capsule to a circuit board footprint smaller than the largest side of said capsule.
20. An optoelectrical transceiver unit comprising a circuit board comprising the optoelectrical capsule according to claim 19.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A circuit comprising:
a first current path comprising a first floating-gate transistor having a programmable threshold voltage;
a second current path comprising:
a second floating-gate transistor having a programmable threshold voltage; and
a resistor; and
a differential amplifier including a first input coupled to the first current path, a second input coupled to the second current path, and an output configured to control a reference current path.
2. The circuit of claim 1, further comprising:
a power supply terminal;
a first p-channel transistor including a source terminal coupled to the power supply terminal, a drain terminal coupled to the first current path, and a gate terminal coupled to the output of the differential amplifier; and
a second p-channel transistor including a source terminal coupled to the power supply terminal, a drain terminal coupled to the second current path, and a gate terminal coupled to the output of the differential amplifier.
3. The circuit of claim 2, further comprising:
a reference current path comprising:
a third p-channel transistor including a source terminal coupled to the power supply terminal, a drain terminal to carry a reference current, and a gate terminal coupled to the output of the comparator;
a reference resistor including a first terminal coupled to the drain of the third p-channel transistor.
4. The circuit of claim 1, further comprising a reference transistor having a reference threshold.
5. The circuit of claim 4, further comprising a programming circuit to program the first and second floating-gate transistors relative to the threshold of the reference transistor.
6. The circuit of claim 4, further comprising a programming circuit to configure the first floating-gate transistor relative to the threshold of the reference transistor.
7. A circuit comprising:
a current mirror comprising a plurality of transistors including an output transistor to provide a reference current;
an amplifier circuit including an output configured to control the current flow through the current mirror, and including first and second inputs;
a resistor including a first terminal coupled to the second input, and including a second terminal;
a first floating-gate transistor including a first terminal coupled to the first input and programmable to define a first threshold voltage;
a second floating-gate transistor including a first terminal coupled to the second terminal of the resistor and programmable to define a second threshold voltage.
8. The circuit of claim 7, wherein the plurality of transistors comprises:
a first p-channel transistor including a source terminal coupled to a power supply terminal, a gate terminal coupled to the output of the amplifier circuit, and a drain terminal coupled to the first input of the amplifier circuit;
a second p-channel transistor including a source terminal coupled to the power supply terminal, a gate terminal coupled to the output of the amplifier circuit, and a drain terminal coupled to the second input of the amplifier circuit; and
an output transistor including a source terminal coupled to the power supply terminal, a gate terminal coupled to the output of the amplifier circuit, and a drain terminal to provide the reference current.
9. The circuit of claim 8, further comprising a second resistor including a first terminal coupled to the drain terminal of the second-p-channel transistor and including a second terminal coupled to the second input of the amplifier circuit.
10. The circuit of claim 7, wherein the first and second floating-gate transistors comprise p-channel transistors, and wherein the first terminals of the first and second floating-gate transistors comprise source terminals.
11. The circuit of claim 10, wherein the drain and gate terminals of the first and second floating-gate transistors are coupled to ground.
12. The circuit of claim 7, wherein the first and second floating-gate transistors comprise n-channel transistors, and wherein the first terminals of the first and second floating-gate transistors comprise drain terminals.
13. The circuit of claim 12, wherein the first floating-gate transistor comprises a gate terminal coupled to the first input of the amplifier circuit; and
wherein the second floating-gate transistor comprises a gate terminal coupled to the second terminal of the resistor.
14. The circuit of claim 12, wherein the first floating-gate transistor comprises a gate terminal coupled to the first input of the amplifier circuit; and
wherein the second floating-gate transistor comprises a gate terminal coupled to the gate terminal of the first floating-gate transistor.
15. A method of providing a reference current, the method comprising:
programming a threshold voltage of a first floating-gate transistor;
selectively programming a threshold voltage of a second floating-gate transistor; and
applying a voltage related to the threshold voltages of the first and second floating-gate transistors across a resistor to generate a reference current.
16. The method of claim 15, further comprising providing the reference current to another circuit.
17. The method of claim 15, wherein programming the threshold voltage of the first floating-gate transistor comprises programming the threshold voltage based on a reference threshold voltage.
18. The method of claim 15, wherein selectively programming the threshold voltage of the second floating-gate transistor comprises selectively programming the threshold voltage relative to one of a reference threshold voltage of a reference transistor and the threshold voltage of the first floating-gate transistor.
19. The method of claim 15, wherein programming the threshold voltage of the first floating-gate transistor comprises:
activating a switch to couple a pre-determined bias current to the reference transistor;
activating a switch to decouple the resistor and the second floating-gate transistor from the second input of the differential amplifier;
activating a switch to couple the programming reference transistor to the second input of the differential amplifier;
generating a programming reference based on the pre-determined bias current; and
controlling a tunneling structure using a high voltage circuit to program the threshold voltage of the first floating-gate transistor based on the programming reference.
20. The method of claim 19, wherein controlling the tunneling structure comprises:
receiving the programming reference current at a first input of an amplifier;
receiving a test current at a second input of the amplifier; and
comparing the programming reference current to the test current using the amplifier to produce the programming control signal.
21. The method of claim 15, wherein selectively programming the threshold voltage of the second floating-gate transistor comprises:
activating a switch to decouple the first floating-gate transistor from its original bias;
activating a switch to couple a pre-determined bias current to the first floating-gate transistor;
generating a programming reference based on the pre-determined bias current; and
controlling a tunneling structure using a high voltage circuit to program the threshold voltage of the second floating-gate transistor based on the programming reference.
22. The method of claim 15, wherein selectively programming the threshold voltage of the second floating-gate transistor comprises:
activating a switch to decouple the first floating-gate transistor from the first input of the differential amplifier;
activating a switch to couple a reference transistor biased by a pre-determined current and having a reference threshold to the first input of the differential amplifier;
generating a programming reference based on the pre-determined bias current; and
controlling a tunneling structure using a high voltage circuit to program the threshold voltage of the second floating-gate transistor based on the programming reference.