1. A device comprising:
a motor of a hermetic compressor; said motor including a stator formed by a stack of laminations , which are overlapping and lodge coil windings
a hermetic shell containing said motor therein; said shell carrying a power inlet plug for connection to a current supply source; and
an electric connector comprising an electric insulating body, seated against the stack of laminations of the stator, said electric connector further includes:
a plurality of binding posts which receive and affix respective wires from the coil windings;
contact terminals, electrically connected to the binding posts and which are configured to connect to the power inlet plug of the shell, by respective conductors;
at least one fixing means, which is fitted and immobilized in a retaining bore provided in the stack of laminations of the stator, said fixing means is a projection having external circumferential ribs; and
a support stop coupled to the electric insulating body, and which is configured to be seated on an adjacent portion of the coil windings.
2. The device according to claim 1, wherein the insulating body is seated against one of the end laminations of the stack of laminations of the stator.
3. The device according to claim 2, wherein the retaining bore is axially provided in the stack of laminations of the stator, externally to the coil windings.
4. The device according to claim 1, wherein the retaining bore presents a diameter smaller than the diameter of the projection containing extensions of the external circumferential ribs.
5. The device according to claim 4, wherein the extensions of the external circumferential ribs are parallel and aligned to each other, and resiliently flexible for introduction into the retaining bore.
6. The device according to claim 1, wherein the support stop is fastened to the coil windings.
7. The device according to claim 1, wherein the support stop is a rear projection of an upper portion of the electric insulating body.
8. The device according to claim 7, wherein the electric insulating body is provided with at least one front flange defining a guide to be seated against an adjacent external wall portion of the stack of laminations of the stator.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An image processing apparatus comprising:
a central processing unit (CPU) configured to process data;
a random access memory (RAM) comprising a first storage area storing the data processed by the CPU and a second storage area different from the first storage area; and
a RAM controller configured to authorize the CPU to access the first storage area and block the CPU from accessing the second storage area.
2. The image processing apparatus according to claim 1, further comprising:
a display; and
a decoder configured to decode image data and output the decoded data to be displayed as an image on the display,
wherein the RAM controller is further configured to authorize the decoder to access the second storage area.
3. The image processing apparatus according to claim 2, further comprising a descrambler configured to decrypt encrypted data in the first storage and load the decrypted data into the second storage area,
wherein the RAM controller is further configured to authorize the descrambler to access the second storage area.
4. The image processing apparatus according to claim 3, wherein the descrambler is further configured to receive a decryption key for decryption from the CPU.
5. The image processing apparatus according to claim 3, wherein the RAM controller is further configured to block the CPU from reading from and writing to the second storage area and is further configured to authorize the descrambler to write data into the second storage area.
6. The image processing apparatus according to claim 2, further comprising a register configured to store information about authorities of the CPU and the decoder with respect to access to each of the first storage area and the second storage area,
wherein the RAM controller is further configured to selectively restrict the access of the CPU and the decoder to the RAM based on the information stored in the register.
7. The image processing apparatus according to claim 6, wherein the register comprises a read only memory (ROM).
8. The image processing apparatus according to claim 1, wherein the first storage area and the second storage area comprise areas with physical address ranges not overlapping with each other.
9. A method of controlling an image processing apparatus, the method comprising:
loading data to a random access memory (RAM) comprising a first storage area and a second storage area different from the first storage area;
authorizing a central processing unit (CPU) to access the first storage area; and
blocking the CPU from accessing the second storage area.
10. The method according to claim 9, further comprising:
authorizing a decoder to access the second storage area and decode the data stored in the second storage area and output the decoded data to be displayed as an image on a display.
11. The method according to claim 10, further comprising:
loading into the second storage area data that is decrypted by a descrambler for decrypting encrypted data loaded into the first storage area by the CPU; and
authorizing the descrambler to access the second storage area.
12. The method according to claim 11, further comprising receiving a decryption key for decryption, by the descrambler, from the CPU, wherein the descrambler decrypts the encrypted data using the received decryption key and loads the decrypted data into the second storage area.
13. The method according to claim 11, wherein the authorizing the access of the descrambler comprises blocking the CPU from reading from and writing to the second storage area, and authorizing the descrambler to write data into the second storage area.
14. The method according to claim 10, further comprising:
storing information about authorities of the CPU and the decoder to access each of the first storage area and the second storage area into a register; and
selectively restricting the access of the CPU and the decoder to the RAM based on the information stored in the register.
15. The method according to claim 9, wherein the first storage area and the second storage area comprise areas with physical address ranges not overlapping with each other.
16. An image processing apparatus comprising:
a central processing unit (CPU) configured to process data;
a random access memory (RAM) configured to store the data processed by the CPU; and
a RAM controller configured to selectively restrict access of the CPU to the RAM,
wherein the RAM controller is further configured to divide the RAM into a first storage area which stored the data processed by the CPU and a second storage area different from the first storage area, and is further configured to block the CPU from accessing the second storage area.