In the claims:
1. A laser oscillator comprising:
a linear unstable optical resonator formed by a plurality of at least partially reflecting elements, said linear unstable optical resonator being suitable for recirculating laser radiation at a cavity wavelength to establish a cavity mode;
a plurality of active mirror amplifiers (AMA) modules arranged in spaced apart relation to one another and in operating relationship with said linear unstable resonator for providing laser amplification of said laser radiation at the cavity wavelength;
said plurality of AMA modules being arranged such that said laser radiation recirculating inside said resonator can be received, amplified, and retransmitted successively by each said AMA module;
each of said AMA modules including at least one, actively cooled solid-state laser gain medium arranged in an active mirror configuration, for supporting said laser gain medium and a pump for providing optical pump radiation into said laser gain medium for excitation thereof; and
said linear unstable optical resonator being operable to outcouple a portion of said laser radiation recirculating therein.
2. The solid-state laser oscillator of claim 1 wherein said linear unstable optical resonator comprises a positive branch type laser oscillator.
3. The solid-state laser oscillator of claim 1, wherein said linear unstable optical resonator comprises a negative branch type laser oscillator.
4. The solid-state laser oscillator of claim 1, wherein said laser radiation recirculating inside said resonator substantially fills an optical aperture of each of said AMA modules.
5. The solid-state laser oscillator of claim 1, further including means for spectral filtering of said laser radiation.
6. The solid-state laser oscillator of claim 5, wherein said means for spectral filtering comprises an optical grating forming a part of the resonator, said grating being mounted to rotate so as to achieve wavelength selection of said laser radiation.
7. The solid-state laser oscillator of claim 1, further incorporating adaptive optics means within said unstable optical resonator to perform at least partial wavefront correction of optical radiation therein.
8. The solid-state laser oscillator of claim 7 wherein:
said adaptive optics means includes at least one element for phase front correction, said one element being selected from one of a deformable mirror and a steering mirror,
said adaptive optics means including at least one sensor element, said sensor element comprising one of a wavefront sensor, a beam intensity profile sensor, and a sensor for measuring total laser beam power in a specified optical aperture.
9. The solid-state laser oscillator of claim 1, wherein said outcoupling function is provided by a partially transmissive element.
10. The solid-state laser oscillator of claim 1, wherein said plurality of AMA modules is arranged in first and second generally groups of circular arrays having approximately the same diameter;
said arrays being disposed in facing relationship and having a common axis of symmetry; and
said laser radiation being successively received, amplified and retransmitted alternately by said AMA modules in the first said array and the second said array.
11. A laser oscillator comprising:
a ring unstable optical resonator formed by a plurality of at least partially reflecting elements, said resonator being operable to recirculate laser radiation at a cavity wavelength to establish a cavity mode;
a plurality of active mirror amplifier (AMA) modules arranged inside said ring unstable optical resonator for providing laser amplification of said laser radiation at the cavity wavelength;
said plurality of AMA modules being arranged to allow laser radiation recirculating inside said resonator to be received, amplified and retransmitted successively by each said AMA module;
each said AMA module including:
at least one solid-state laser gain medium provided in an active mirror configuration,
a support for supporting said laser gain medium;
an optical pump for providing optical pump radiation into said laser gain medium for excitation thereof; and
said ring unstable optical resonator having a system for outcoupling a portion of said laser radiation recirculating therein from said resonator.
12. The solid-state laser oscillator of claim 11, wherein said ring unstable optical resonator comprises a positive branch type laser oscillator.
13. The solid-state laser oscillator of claim 11, wherein said ring unstable optical resonator comprises a negative branch type laser resonator.
14. The solid-state laser oscillator of claim 13, wherein said resonator further comprises a self-imaging type resonator.
15. The solid-state laser oscillator of claim 11, further incorporating a system for suppressing reverse wave oscillations in said ring unstable optical resonator.
16. The solid-state laser oscillator of claim 11, wherein said laser radiation recirculating inside said resonator substantially fills an optical aperture of each of said AMA modules.
17. The solid-state laser oscillator of claim 11, further including means for spectral filtering of said laser radiation.
18. The solid-state laser oscillator of claim 17, wherein said means for spectral filtering comprises an optical grating which forms a part of said resonator, said grating being mounted for radiation to enable wavelength selection of said laser radiation.
19. The solid-state laser oscillator of claim 11, further including adaptive optics means disposed within said unstable optical resonator to perform at least partial wavefront correction of optical radiation circulating therein.
20. The solid-state laser oscillator of claim 19 wherein:
said adaptive optics means includes at least one of a deformable mirror or a steering mirror for performing phase front correction; and
said adaptive optics means including at least one of a wavefront sensor, a beam intensity profile sensor or a sensor for measuring total laser beam power in a specified optical aperture.
21. The solid-state laser oscillator of claim 11, wherein said outcoupling means include at least one partially transmissive element.
22. The solid-state laser oscillator of claim 11, wherein said plurality of AMA modules is arranged in two groups of generally circular arrays of approximately the same diameter size;
said arrays being disposed in facing relationship and having a common axis of symmetry; and
said laser radiation being successively received, amplified and retransmitted alternately by AMA modules in the first said array and the second said array.
23. An active mirror amplifier (AMA) module comprising:
a substrate;
a laser gain medium;
said substrate being provided with a flowing coolant for cooling said laser gain medium;
said coolant being provided to and from said substrate by a plurality of pressure-balanced coolant transfer tubes;
said tubes isolating said substrate from hydrostatic pressure loads resulting from the coolant flowing therethrough;
said tubes further permitting small axial and lateral positional adjustments of said substrate as may be required to optically align said laser gain medium; and
wherein said adjustments can be effected without affecting the operation of said coolant transfer tubes and without exerting significant forces onto the substrate from said tubes.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first insulative film of a single layer or a stacked layer on a surface of a semiconductor wafer;
(b) removing the first insulative film on an edge of the semiconductor wafer;
(c) patterning the first insulative film after the step (b);
(d) etching the semiconductor wafer by using the first insulative film as a mask after the step (c);
(e) forming a second insulative film on the semiconductor wafer including a portion on the first insulative film after the step (d); and
(f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof.
2. A fabrication method of a semiconductor integrated circuit device according to claim 1,
wherein the step (b) is conducted by polishing with a polishing means using a slurry or a grinding wheel.
3. A fabrication method of a semiconductor integrated circuit device according to claim 2, wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.
4. A fabrication method of a semiconductor integrated circuit device according to claim 1, wherein the step (b) is conducted by dry etching or wet etching.
5. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first insulative film of a single layer or a stacked layer on a surface of a semiconductor wafer;
(b) patterning the first insulative film;
(c) etching the semiconductor wafer by using the first insulative film as a mask after the step (b);
(d) forming a second insulative film on the semiconductor wafer including a portion on the first insulative film after the step (c);
(e) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof; and
(f) polishing the second insulative film on an edge of the semiconductor wafer with the first insulative film being as a polishing end point after the step (e).
6. A fabrication method of a semiconductor integrated circuit device according to claim 5,
wherein the step (f) is conducted by polishing with a polishing means using a slurry or a grinding wheel.
7. A fabrication method of a semiconductor integrated circuit device according to claim 6, wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.
8. A fabrication method of a semiconductor integrated circuit device according to claim 5, wherein the step (f) is conducted by dry etching or wet etching.
9. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a third insulative film on a surface of a semiconductor wafer;
(b) patterning the third insulative film;
(c) forming a first conductive film over the semiconductor wafer including a portion on the third insulative film;
(d) removing the first conductive film on an edge of the semiconductor wafer after the step (c); and
(e) mechanically or chemically polishing the first conductive film with a surface of the third insulative film on a semiconductor chip obtainable region of the semiconductor wafer being as a polishing end point.
10. A fabrication method of a semiconductor integrated circuit device according to claim 9,
wherein the step (f) is conducted by polishing with a polishing means using a slurry or a grinding wheel.
11. A fabrication method of a semiconductor integrated circuit device according to claim 10, wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.
12. A fabrication method of a semiconductor integrated circuit device according to claim 9, wherein the step (d) is conducted by dry etching or wet etching.
13. A fabrication method of a semiconductor integrated circuit device according to claim 9, wherein the third insulative film on the edge of the semiconductor wafer is also removed by a predetermined thickness in the step (d) in a case where the first conductive film is a copper film or a copper alloy film.
14. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a third insulative film on a surface of a semiconductor wafer;
(b) patterning the third insulative film;
(c) forming a first conductive film over the semiconductor wafer including a portion on the third insulative film after the step (b);
(d) mechanically or chemically polishing the first conductive film with the surface of the third insulative film on the semiconductor chip obtainable region of the semiconductor wafer being as a polishing end point; and
(e) removing the first conductive film on the edge of the semiconductor wafer after the step (d).
15. A fabrication method of a semiconductor integrated circuit device according to claim 14,
wherein the step (e) is conducted by polishing with a polishing means using a slurry or a grinding wheel.
16. A fabrication method of a semiconductor integrated circuit device according to claim 15, wherein the polishing means has plural polishing drums in which each of the plural polishing drums are in contact with the edge of the semiconductor wafer in a region different from each other and the angle of contact changes in accordance with the shape of the edge of the semiconductor wafer.
17. A fabrication method of a semiconductor integrated circuit device according to claim 14, wherein the step (e) is conducted by dry etching or wet etching.
18. A fabrication method of a semiconductor integrated circuit device according to claim 14, wherein the third insulative film on the edge of the wafer is also removed by predetermined thickness in the step (e) in a case where the first conductive film is a copper film or a copper alloy film.
19. A fabrication method of a semiconductor integrated circuit device including steps of:
(a) forming a first conductive film on a semiconductor wafer;
(b) removing the first conductive film on an edge of the semiconductor wafer with a polishing means using a slurry or a abrasive wheel; and
(c) patterning the first conductive film, thereby forming wirings after the step (b).
20. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first conductive film on a semiconductor wafer;
(b) patterning the first conductive film, thereby forming wirings; and
(c) removing the first conductive film on an edge of the semiconductor wafer with a polishing means using a slurry or an abrasive wheel after the step (b).
21. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first conductive film on a semiconductor wafer;
(b) patterning the first conductive film, thereby forming first wirings;
(c) forming a fourth insulative film over the semiconductor wafer including a portion on the first wirings;
(d) removing the fourth insulative film on an edge of the semiconductor wafer; and
(e) mechanically and chemically polishing the surface of the fourth insulative film, thereby planarizing the surface thereof after the step (d).
22. A fabrication method of a semiconductor integrated circuit device according to claim 21,
wherein the step (d) is conducted by polishing with a polishing means using a slurry or an abrasive wheel.
23. A fabrication method of a semiconductor integrated circuit device according to claim 22,
wherein the polishing means includes plural polishing drums, each of the plural polishing drums is in contact with the edge of the semiconductor wafer at a region different from each other and the angle of contact thereof changes depending on the shape of the edge of the semiconductor wafer.
24. A fabrication method of a semiconductor integrated circuit device according to claim 21,
wherein the step (d) is conducted by dry etching or wet etching.
25. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a first conductive film on a semiconductor wafer;
(b) patterning the first conductive film, thereby forming first wirings;
(c) forming a fourth insulative film over the semiconductor wafer including a portion on the first wirings;
(d) mechanically and chemically polishing a surface of the fourth insulative film, thereby planarizing the surface thereof; and
(e) removing the fourth insulative film on the edge of the semiconductor wafer after the step (d).
26. A fabrication method of a semiconductor integrated circuit device according to claim 25,
wherein the step (e) conducting polishing by a Polishing means using a slurry or an abrasive wheel.
27. A fabrication method of a semiconductor integrated circuit device according to claim 26,
wherein the polishing means includes plural polishing drums, each of the plural polishing drums is in contact with the edge of the semiconductor wafer at a region different from each other and the angle of contact thereof changes depending on the shape of the edge of the semiconductor wafer.
28. A fabrication method of a semiconductor integrated circuit device according to claim 25,
wherein the step (e) is conducted by dry etching or wet etching.
29. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a single layer or stacked layer of a first insulation film on a surface of a semiconductor wafer;
(b) removing the first insulative film on an edge of the semiconductor wafer;
(c) patterning the insulative film after the step (b);
(d) etching the semiconductor wafer using the first insulative film as a mask after the step (c);
(e) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (d);
(f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing surface thereof;
(g) forming a third insulative film over the semiconductor wafer after the step (f);
(h) removing the third insulative film on the edge of the semiconductor wafer; and
(i) mechanically and chemically polishing a surface of the third insulative film, thereby planarizing the surface thereof after the step (h).
30. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a single layer or stacked layer of a first insulation film on a surface of a semiconductor wafer;
(b) removing the first insulative film on an edge of the semiconductor wafer;
(c) patterning the insulative film after the step (b);
(d) etching the semiconductor wafer by using the first insulative film as a mask after the step (c);
(e) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (d);
(f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof;
(g) forming a third insulative film over the semiconductor wafer after the step (f);
(h) mechanically and chemically polishing the surface of the third insulative film, thereby planarizing surface thereof; and
(i) removing the third insulative film on the edge of the semiconductor wafer after the step (h).
31. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a single layer or a stacked layer of a first insulative film on a surface of a semiconductor wafer;
(b) patterning the first insulative film;
(c) etching the semiconductor wafer by using the first insulative film as a mask after the step (b);
(d) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (c);
(e) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof;
(f) polishing the second insulative film on the edge of the semiconductor wafer with the first insulative film being as a polishing end point after the step (e);
(g) forming a third insulative film over the semiconductor wafer after the step (f);
(h) removing the third insulative film on an edge of the semiconductor wafer; and
(i) mechanically and chemically polishing a surface of the insulative film, thereby planarizing the surface thereof after the step (h).
32. A fabrication method of a semiconductor integrated circuit device comprising the steps of:
(a) forming a single layer or a stacked layer of a first insulative film on a surface of a semiconductor wafer;
(b) patterning the first insulative film;
(c) etching the semiconductor wafer by using the first insulative film as a mask after the step (b);
(d) forming a second insulative film over the semiconductor wafer including a portion on the first insulative film after the step (c);
(e) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof;
(f) polishing the second insulative film on the edge of the semiconductor wafer with the first insulative film being as a polishing end point after the step (e);
(g) forming a third insulative film over the semiconductor wafer after the step (f);
(h) mechanically and chemically polishing a surface of the third insulative film, thereby planarizing the surface thereof; and
(i) removing the third insulative film on an edge of the semiconductor wafer after the step (h).