1. A method for providing direct bonding of wires to silicon for microelectronics and microelectromechanical systems (MEMS), said method comprising:
preparing a rough pothole during one of the many deep etch steps already performed in microelectronics and MEMS fabrication;
roughening of the smooth silicon surface in and around said rough pothole; and
plastically deforming a ball-bond into said rough pothole, such that the interconnection will eliminate a costly metallization layer, and thereby lower fabrication expenses and enable further high temperature processing.
2. The method according to claim 1, wherein the metallization layer eliminated is a gold layer.
3. The method according to claim 1, wherein the metallization layer eliminated is an aluminum layer.
4. The method according to claim 1, wherein the method is part of semiconductor device fabrication.
5. The method according to claim 4, wherein said fabrication uses passivation layers.
6. The method according to claim 5, wherein the passivation layers are used as hard masks.
7. The method according to claim 5, wherein the passivation layers are used as electric isolation.
8. The method according to claim 1, wherein said pothole is a silicon Deep Reactive Ion Etching (DRIE) pothole.
9. A system for providing direct bonding of wires to silicon for microelectronics and microelectromechanical systems (MEMS), said system comprising:
means for preparing a rough pothole during one of the many deep etch steps already performed in microelectronics and MEMS fabrication;
means for roughening of the smooth silicon surface in and around said rough pothole; and
means for plastically deforming a ball-bond into said rough pothole, such that the interconnection will eliminate a costly metallization layer, and thereby lower fabrication expenses and enable further high temperature processing.
10. The system according to claim 9, wherein the metallization layer eliminated is a gold layer.
11. The method according to claim 1, wherein the metallization layer eliminated is an aluminum layer.
12. The system according to claim 9, wherein the system is part of semiconductor device fabrication.
13. The system according to claim 12, wherein said fabrication uses passivation layers.
14. The system according to claim 13, wherein the passivation layers are used as hard masks.
15. The system according to claim 13, wherein the passivation layers are used as electric isolation.
16. The system according to claim 9, wherein said pothole is a silicon Deep Reactive Ion Etching (DRIE) pothole.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An apparatus comprising: a coherent light source; a first diffraction grating, the first diffraction grating having a first period; a micro-electrical mechanical system (MEMS), the MEMS being displaced from the first diffraction grating and being configured to modulate and induce a phase shift in light received from the coherent light source; an analyte recognition material disposed on the surface of the first diffraction grating; and a detector configured to receive light from the coherent light source after the light has been diffracted from the first diffraction grating and modulated by the MEMS.
2. The apparatus of claim 1, wherein the MEMS is configured to simulate a lateral displacement of a grating with respect to a normal of the first grating.
3. The apparatus of claim 2, wherein the lateral displacement is a displacement of less than one period.
4. The apparatus of claim 3, wherein the lateral displacement is a displacement of approximately \xbc period.
5. The apparatus of claim 1, further comprising: a spatial filter disposed relative to the MEMS such that predetermined orders of diffracted light are prevented from reaching the detector.
6. The apparatus of claim 1, wherein the MEMS is configured to modulate the light at a frequency of approximately 1 kHz or more.
7. The apparatus of claim 1, wherein the MEMS is configured to modulate the light at a frequency of approximately 10 kHz or more.
8. The apparatus of claim 1, wherein the analyte recognition material is one of an antibody, antigen, peptide, nucleic acid, cell, phage display, protein, lectin, molecular imprinted polymer (MIP), fellerene, carbon nanotube, and a carbon-based nano-system.
9. The apparatus of claim 1, the detector being a first detector, the apparatus further comprising: a light source, the light source being configured to excite a fluorescent marker thereby causing spontaneous emission from the fluorescent marker; a second detector, the second detector being configured to receive energy from the spontaneous emission.
10. A method for examining light, comprising: illuminating a first grating with light from a coherent light source, the first grating including an analyte recognition material deposited thereon; receiving the light from the coherent light source at a micro-electrical mechanical system (MEMS) after the light passes through the grating including the analyte recognition material; modulating the light received at the MEMS at a frequency; and detecting a phase of the light received from the MEMS at a detector.
11. The method of claim 10, wherein the MEMS is configured to modulate the light at a frequency of approximately 1 kHz or more.
12. The method of claim 10, wherein the MEMS is configured to modulate the light at a frequency of approximately 10 kHz or more.
13. The method of claim 10, wherein the MEMS is configured to simulate a lateral displacement of a grating with respect to the first grating.
14. The method of claim 13, wherein the lateral displacement is approximately (\xbc) period.
15. The method of claim 10, wherein detecting a phase of the light received from the MEMS at a detector includes detecting a phase change of the light due to a binding event.