1. A fluid injection system including: a pressurized fluid source operatively coupled to an injector, the injector including:
a handle portion,
a frame portion,
a spike portion,
a pressure plate attached to the spike portion,
a fluid inlet proximate the handle portion,
a fluid outlet proximate a distal tip of the spike portion,
a fluid pathway extending between the fluid inlet and the fluid outlet, the fluid pathway including a valve operable to control the flow of fluid through the fluid pathway,
wherein during insertion or removal of the spike portion at a desired location fluid from the pressurized fluid source is delivered to the location.
2. The fluid injection system of claim 1, wherein the pressurized fluid source is a pressurized gas source.
3. The fluid injection system of claim 1, wherein the pressurized fluid source is a pressurized liquid source.
4. The air injection system of claim 2, further including proximate the handle portion a switch operable to open and close the valve.
5. The air injection system of claim 2, further including a plurality of depth markers disposed along a length of the spike portion.
6. The air injection system of claim 2, wherein the fluid outlet includes a plurality of fluid ports spaced along a length of the spike portion.
7. The air injection system of claim 2, wherein the fluid outlet includes a plurality of fluid ports spaced about a circumference of the spike portion.
8. The air injection system of claim 7, wherein four fluid ports are spaced at approximately ninety degree intervals.
9. The air injection system of claim 2, wherein the desired location is a turf area.
10. A fluid injector including:
a handle portion,
a frame portion,
a spike portion,
a pressure plate attached to the spike portion,
a fluid inlet proximate the handle portion,
a fluid outlet proximate a distal tip of the spike portion,
a fluid pathway extending between the fluid inlet and the fluid outlet, the fluid pathway including a valve operable to control the flow of fluid through the fluid pathway,
wherein during insertion or removal of the spike portion at a desired location fluid at the fluid inlet is deliverable to the location.
11. The fluid injector of claim 10, wherein the fluid injector further includes:
proximate the handle portion, a switch operable to open and close the valve;
a plurality of depth markers disposed along a length of the spike portion; and
a plurality of fluid ports spaced about a circumference of the spike portion.
12. The fluid injector of claim 11, wherein two fluid ports are spaced about ninety degrees apart.
13. The fluid injector of claim 11, wherein two fluid ports are spaced about one hundred eighty degrees apart.
14. A turf treatment method including the steps of:
(a) providing a fluid injection system including a fluid injector operably coupled to a source of pressurized fluid; the fluid injector including a handle portion, a frame portion, a spike portion, a pressure plate attached to the spike portion, a fluid inlet, a fluid outlet proximate a distal tip of the spike portion, a fluid pathway extending between the fluid inlet and the fluid outlet, the fluid pathway including a valve operable to control the flow of fluid through the fluid pathway;
(b) providing fluid from the pressurized fluid source to the turf to be treated via the fluid injector at a desired time.
15. The method of claim 14, wherein the desired time is during insertion of the spike portion into the turf.
16. The method of claim 14, wherein the desired time is after insertion of the spike portion into the turf.
17. The method of claim 14, wherein the desired time is during withdrawal of the spike portion from the turf.
18. The method of claim 14, wherein the fluid is air.
19. The method of claim 14, wherein the fluid includes water.
20. The method of claim 18, further including the step of forming macropore spaces in the turf.
21. The system of claim 1, wherein the pressure plate is positionable along the length of the spike portion.
22. The fluid injector of claim 10, wherein the pressure plate is positionable along the length of the spike portion.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device comprising a semiconductor chip, the semiconductor chip comprising:
a bonding wire; and
a metal coating structure on an active upper side of the semiconductor chip, the metal coating structure comprising:
precious-metal-containing bonding areas on the upper side of the semiconductor chip, and
a plurality of metal layers arranged one on top of the other and comprising:
a copper-containing lower metal layer forming interconnects and contact terminal areas,
a central metal layer comprising at least one of nickel and nickel phosphide, covering the lower metal layer, and
an upper metal layer comprising a precious metal, covering at least the bonding areas and, the bonding wire being attached to the upper metal layer, the upper metal layer having a total thickness do such that 0.1 \u03bcm\u2266do\u22661.0 \u03bcm,
wherein the central metal layer has a rough interface with respect to the upper metal layer such that an average roughness height tm of the central metal layer is 0.05 \u03bcm\u2266tm\u22661.00 \u03bcm.
2. The semiconductor device according to claim 1, wherein a roughness of the interface of the central metal layer is formed galvanically in a front-end process by variation of current densities during deposition.
3. The semiconductor device according to claim 1, wherein a roughness of the interface of the central metal layer is such that there is great adhesiveness with respect to the plastic package molding compound, and the roughness of the interface of the central metal layer is further such that a bondability of the bonding areas is not impaired.
4. The semiconductor device according to claim 1, wherein a thickness du of the lower copper-containing metal layer of the coating structure is 2 \u03bcm\u2266du\u226650 \u03bcm.
5. The semiconductor device according to claim 1, wherein a diffusion-inhibiting metal layer comprising at least one of tungsten and titanium is arranged between the copper-containing metal layer of the contact terminal areas and the contact areas of the semiconductor chip, which are in connection with the electrodes of semiconductor elements of the semiconductor chip.
6. The semiconductor device according to claim 1, wherein a metal layer comprising at least one of tungsten and titanium is arranged as a diffusion barrier between the copper-containing metal layer of the interconnects and the passivation layers of the upper side of the semiconductor chip.
7. The semiconductor device according to claim 1, wherein cross sections of the interconnects of the metal coating structure have such dimensions that the interconnects are capable of carrying source or emitter currents of power semiconductor chips.
8. The semiconductor device according to claim 1, wherein the metal coating structure covers a proportion of a surface area \u0394F of the active upper side of the semiconductor chip, with \u0394F 50%.
9. The semiconductor device according to claim 1, wherein the semiconductor device is a power device.
10. A power semiconductor module comprising a semiconductor chip, the semiconductor chip comprising:
a bonding wire; and
a metal coating structure on an active upper side of the semiconductor chip, the metal coating structure comprising:
precious-metal-containing bonding areas on the upper side of the semiconductor chip, and
a plurality of metal layers arranged one on top of the other and comprising:
a copper-containing lower metal layer forming interconnects and contact terminal areas,
a central metal layer comprising at least one of nickel and nickel phosphide, covering the lower metal layer, and
an upper metal layer comprising a precious metal, covering at least the bonding areas, the bonding wire being attached to the upper metal layer, the upper metal layer having a total thickness do such that 0.1 \u03bcm\u2266do\u22661.0 \u03bcm,
wherein the central metal layer has a rough interface with respect to the upper metal layer such that an average roughness height tm of the central metal layer is 0.05 \u03bcm\u2266tm\u22661.00 \u03bcm.
11. A semiconductor chip comprising a metal coating structure on an active upper side of the semiconductor chip, the metal coating structure comprising:
precious-metal-containing bonding areas on the active upper side;
a plurality of metal layers arranged one on top of the other and comprising:
a copper-containing lower metal layer forming interconnects and contact terminal areas,
a central metal layer, comprising at least one of nickel and nickel phosphide, covering the lower metal layer, and
an upper metal layer comprising palladium, covering at least the bonding areas, the upper metal layer having a total thickness do such that 0.1 \u03bcm\u2266do\u22661.0 \u03bcm,
wherein the central metal layer has a rough interface with respect to the upper metal layer such that an average roughness height tm of the central metal layer is 0.05 \u03bcm\u2266tm\u22661.00 \u03bcm; and
a bonding wire attached to the upper metal layer.
12. The semiconductor chip according to claim 11, wherein a roughness of the interface of the central metal layer is formed galvanically in a front-end process by variation of current densities during deposition.
13. The semiconductor chip according to claim 11, wherein a roughness of the interface of the central metal layer is such that there is great adhesiveness with respect to the plastic package molding compound, and the roughness of the interface of the central metal layer is further such that a bondability of the bonding areas is not impaired.
14. The semiconductor chip according to claim 11, wherein a thickness du of the lower copper-containing metal layer of the coating structure is 2 \u03bcm\u2266du\u226650 \u03bcm.
15. The semiconductor device of according to claim 1, wherein the upper metal layer covers only the bonding areas, and wherein the central metal layer further has a rough interface with respect to a plastic package molding compound surrounding the metal coating structure.
16. The semiconductor chip according to claim 11, wherein the upper metal layer covers only the bonding areas, and wherein the central metal layer further has a rough interface with respect to a plastic package molding compound surrounding the metal coating structure.
17. The semiconductor device of claim 1, wherein the upper metal layer has an upper surface that is rough, the bonding wire being connected to the rough upper surface of the upper metal layer.
18. The power semiconductor module of claim 10, wherein the upper metal layer has an upper surface that is rough, the bonding wire being connected to the rough upper surface of the upper metal layer.
19. The semiconductor chip of claim 11, wherein the upper metal layer has an upper surface that is rough, the bonding wire being connected to the rough upper surface of the upper metal layer.
20. A semiconductor device comprising a semiconductor chip, the semiconductor chip comprising a metal coating structure on an active upper side of the semiconductor chip, the metal coating structure comprising:
precious-metal-containing bonding areas on the active upper side;
a plurality of metal layers arranged one on top of the other and comprising:
a copper-containing lower metal layer forming interconnects and contact terminal areas,
a central metal layer, comprising at least one of nickel and nickel phosphide, covering the lower metal layer, and
an upper metal layer comprising palladium, covering at least the bonding areas, the upper metal layer having a total thickness do such that 0.1 \u03bcm\u2266do\u22661.0 \u03bcm,
wherein the central metal layer has a rough interface with respect to the upper metal layer such that an average roughness height tm of the central metal layer is 0.05 \u03bcm\u2266tm\u22661.00 \u03bcm; and
a bonding wire attached to the upper metal layer.
21. The semiconductor device of claim 20, wherein the upper metal layer has an upper surface that is rough, the bonding wire being connected to the rough upper surface of the upper metal layer.
22. A power semiconductor module comprising a semiconductor chip, the semiconductor chip comprising a metal coating structure on an active upper side of the semiconductor chip, the metal coating structure comprising:
precious-metal-containing bonding areas on the active upper side;
a plurality of metal layers arranged one on top of the other and comprising:
a copper-containing lower metal layer forming interconnects and contact terminal areas,
a central metal layer, comprising at least one of nickel and nickel phosphide, covering the lower metal layer, and
an upper metal layer comprising palladium, covering at least the bonding areas, the upper metal layer having a total thickness do such that 0.1 \u03bcm\u2266do\u22661.0 \u03bcm,
wherein the central metal layer has a rough interface with respect to the upper metal layer such that an average roughness height tm of the central metal layer is 0.05 \u03bcm\u2266tm\u22661.00 \u03bcm; and
a bonding wire attached to the upper metal layer.
23. The power semiconductor module of claim 22, wherein the upper metal layer has an upper surface that is rough, the bonding wire being connected to the rough upper surface of the upper metal layer.